sbbif1.h

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00001 #ifndef _DEV_SBBIF1_H_
00002 #define _DEV_SBBIF1_H_
00003 /*
00004  * Copyright (C) 2007 by egnite Software GmbH. All rights reserved.
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  *
00010  * 1. Redistributions of source code must retain the above copyright
00011  *    notice, this list of conditions and the following disclaimer.
00012  * 2. Redistributions in binary form must reproduce the above copyright
00013  *    notice, this list of conditions and the following disclaimer in the
00014  *    documentation and/or other materials provided with the distribution.
00015  * 3. Neither the name of the copyright holders nor the names of
00016  *    contributors may be used to endorse or promote products derived
00017  *    from this software without specific prior written permission.
00018  *
00019  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00020  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00021  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00022  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00023  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00024  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00025  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00026  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00027  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00028  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00029  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00030  * SUCH DAMAGE.
00031  *
00032  * For additional information see http://www.ethernut.de/
00033  */
00034 
00049 #include <cfg/arch/gpio.h>
00050 
00054 #ifndef SBBI1_MAX_DEVICES
00055 #define SBBI1_MAX_DEVICES   4
00056 #endif
00057 
00058 #if defined(__AVR__)            /* MCU */
00059 /*
00060  * AVR implementation.
00061  * ======================================
00062  */
00063 
00064 #ifdef SBBI1_CS0_BIT
00065 
00066 #if (SBBI1_CS0_AVRPORT == AVRPORTB)
00067 #define SBBI1_CS0_SOD_REG PORTB
00068 #define SBBI1_CS0_OE_REG  DDRB
00069 #elif (SBBI1_CS0_AVRPORT == AVRPORTD)
00070 #define SBBI1_CS0_SOD_REG PORTD
00071 #define SBBI1_CS0_OE_REG  DDRD
00072 #elif (SBBI1_CS0_AVRPORT == AVRPORTE)
00073 #define SBBI1_CS0_SOD_REG PORTE
00074 #define SBBI1_CS0_OE_REG  DDRE
00075 #elif (SBBI1_CS0_AVRPORT == AVRPORTF)
00076 #define SBBI1_CS0_SOD_REG PORTF
00077 #define SBBI1_CS0_OE_REG  DDRF
00078 #elif (SBBI1_CS0_AVRPORT == AVRPORTG)
00079 #define SBBI1_CS0_SOD_REG PORTG
00080 #define SBBI1_CS0_OE_REG  DDRG
00081 #elif (SBBI1_CS0_AVRPORT == AVRPORTH)
00082 #define SBBI1_CS0_SOD_REG PORTH
00083 #define SBBI1_CS0_OE_REG  DDRH
00084 #endif
00085 
00087 #define SBBI1_CS0_ENA()      sbi(SBBI1_CS0_OE_REG, SBBI1_CS0_BIT)
00088 
00089 #define SBBI1_CS0_CLR()      cbi(SBBI1_CS0_SOD_REG, SBBI1_CS0_BIT)
00090 
00091 #define SBBI1_CS0_SET()      sbi(SBBI1_CS0_SOD_REG, SBBI1_CS0_BIT)
00092 
00093 #endif                          /* SBBI1_CS0_BIT */
00094 
00095 #ifdef SBBI1_CS1_BIT
00096 
00097 #if (SBBI1_CS1_AVRPORT == AVRPORTB)
00098 #define SBBI1_CS1_SOD_REG PORTB
00099 #define SBBI1_CS1_OE_REG  DDRB
00100 #elif (SBBI1_CS1_AVRPORT == AVRPORTD)
00101 #define SBBI1_CS1_SOD_REG PORTD
00102 #define SBBI1_CS1_OE_REG  DDRD
00103 #elif (SBBI1_CS1_AVRPORT == AVRPORTE)
00104 #define SBBI1_CS1_SOD_REG PORTE
00105 #define SBBI1_CS1_OE_REG  DDRE
00106 #elif (SBBI1_CS1_AVRPORT == AVRPORTF)
00107 #define SBBI1_CS1_SOD_REG PORTF
00108 #define SBBI1_CS1_OE_REG  DDRF
00109 #elif (SBBI1_CS1_AVRPORT == AVRPORTG)
00110 #define SBBI1_CS1_SOD_REG PORTG
00111 #define SBBI1_CS1_OE_REG  DDRG
00112 #elif (SBBI1_CS1_AVRPORT == AVRPORTH)
00113 #define SBBI1_CS1_SOD_REG PORTH
00114 #define SBBI1_CS1_OE_REG  DDRH
00115 #endif
00116 
00118 #define SBBI1_CS1_ENA()      sbi(SBBI1_CS1_OE_REG, SBBI1_CS1_BIT)
00119 
00120 #define SBBI1_CS1_CLR()      cbi(SBBI1_CS1_SOD_REG, SBBI1_CS1_BIT)
00121 
00122 #define SBBI1_CS1_SET()      sbi(SBBI1_CS1_SOD_REG, SBBI1_CS1_BIT)
00123 
00124 #endif                          /* SBBI1_CS1_BIT */
00125 
00126 #ifdef SBBI1_CS2_BIT
00127 
00128 #if (SBBI1_CS2_AVRPORT == AVRPORTB)
00129 #define SBBI1_CS2_SOD_REG PORTB
00130 #define SBBI1_CS2_OE_REG  DDRB
00131 #elif (SBBI1_CS2_AVRPORT == AVRPORTD)
00132 #define SBBI1_CS2_SOD_REG PORTD
00133 #define SBBI1_CS2_OE_REG  DDRD
00134 #elif (SBBI1_CS2_AVRPORT == AVRPORTE)
00135 #define SBBI1_CS2_SOD_REG PORTE
00136 #define SBBI1_CS2_OE_REG  DDRE
00137 #elif (SBBI1_CS2_AVRPORT == AVRPORTF)
00138 #define SBBI1_CS2_SOD_REG PORTF
00139 #define SBBI1_CS2_OE_REG  DDRF
00140 #elif (SBBI1_CS2_AVRPORT == AVRPORTG)
00141 #define SBBI1_CS2_SOD_REG PORTG
00142 #define SBBI1_CS2_OE_REG  DDRG
00143 #elif (SBBI1_CS2_AVRPORT == AVRPORTH)
00144 #define SBBI1_CS2_SOD_REG PORTH
00145 #define SBBI1_CS2_OE_REG  DDRH
00146 #endif
00147 
00149 #define SBBI1_CS2_ENA()      sbi(SBBI1_CS2_OE_REG, SBBI1_CS2_BIT)
00150 
00151 #define SBBI1_CS2_CLR()      cbi(SBBI1_CS2_SOD_REG, SBBI1_CS2_BIT)
00152 
00153 #define SBBI1_CS2_SET()      sbi(SBBI1_CS2_SOD_REG, SBBI1_CS2_BIT)
00154 
00155 #endif                          /* SBBI1_CS2_BIT */
00156 
00157 #ifdef SBBI1_CS3_BIT
00158 
00159 #if (SBBI1_CS3_AVRPORT == AVRPORTB)
00160 #define SBBI1_CS3_SOD_REG PORTB
00161 #define SBBI1_CS3_OE_REG  DDRB
00162 #elif (SBBI1_CS3_AVRPORT == AVRPORTD)
00163 #define SBBI1_CS3_SOD_REG PORTD
00164 #define SBBI1_CS3_OE_REG  DDRD
00165 #elif (SBBI1_CS3_AVRPORT == AVRPORTE)
00166 #define SBBI1_CS3_SOD_REG PORTE
00167 #define SBBI1_CS3_OE_REG  DDRE
00168 #elif (SBBI1_CS3_AVRPORT == AVRPORTF)
00169 #define SBBI1_CS3_SOD_REG PORTF
00170 #define SBBI1_CS3_OE_REG  DDRF
00171 #elif (SBBI1_CS3_AVRPORT == AVRPORTG)
00172 #define SBBI1_CS3_SOD_REG PORTG
00173 #define SBBI1_CS3_OE_REG  DDRG
00174 #elif (SBBI1_CS3_AVRPORT == AVRPORTH)
00175 #define SBBI1_CS3_SOD_REG PORTH
00176 #define SBBI1_CS3_OE_REG  DDRH
00177 #endif
00178 
00180 #define SBBI1_CS3_ENA()      sbi(SBBI1_CS3_OE_REG, SBBI1_CS3_BIT)
00181 
00182 #define SBBI1_CS3_CLR()      cbi(SBBI1_CS3_SOD_REG, SBBI1_CS3_BIT)
00183 
00184 #define SBBI1_CS3_SET()      sbi(SBBI1_CS3_SOD_REG, SBBI1_CS3_BIT)
00185 
00186 #endif                          /* SBBI1_CS3_BIT */
00187 
00188 #ifdef SBBI1_RST0_BIT
00189 
00190 #if (SBBI1_RST0_AVRPORT == AVRPORTB)
00191 #define SBBI1_RST0_SOD_REG PORTB
00192 #define SBBI1_RST0_OE_REG  DDRB
00193 #elif (SBBI1_RST0_AVRPORT == AVRPORTD)
00194 #define SBBI1_RST0_SOD_REG PORTD
00195 #define SBBI1_RST0_OE_REG  DDRD
00196 #elif (SBBI1_RST0_AVRPORT == AVRPORTE)
00197 #define SBBI1_RST0_SOD_REG PORTE
00198 #define SBBI1_RST0_OE_REG  DDRE
00199 #elif (SBBI1_RST0_AVRPORT == AVRPORTF)
00200 #define SBBI1_RST0_SOD_REG PORTF
00201 #define SBBI1_RST0_OE_REG  DDRF
00202 #elif (SBBI1_RST0_AVRPORT == AVRPORTG)
00203 #define SBBI1_RST0_SOD_REG PORTG
00204 #define SBBI1_RST0_OE_REG  DDRG
00205 #elif (SBBI1_RST0_AVRPORT == AVRPORTH)
00206 #define SBBI1_RST0_SOD_REG PORTH
00207 #define SBBI1_RST0_OE_REG  DDRH
00208 #endif
00209 
00211 #define SBBI1_RST0_ENA()      sbi(SBBI1_RST0_OE_REG, SBBI1_RST0_BIT)
00212 
00213 #define SBBI1_RST0_CLR()      cbi(SBBI1_RST0_SOD_REG, SBBI1_RST0_BIT)
00214 
00215 #define SBBI1_RST0_SET()      sbi(SBBI1_RST0_SOD_REG, SBBI1_RST0_BIT)
00216 
00217 #endif                          /* SBBI1_RST0_BIT */
00218 
00219 #ifdef SBBI1_RST1_BIT
00220 
00221 #if (SBBI1_RST1_AVRPORT == AVRPORTB)
00222 #define SBBI1_RST1_SOD_REG PORTB
00223 #define SBBI1_RST1_OE_REG  DDRB
00224 #elif (SBBI1_RST1_AVRPORT == AVRPORTD)
00225 #define SBBI1_RST1_SOD_REG PORTD
00226 #define SBBI1_RST1_OE_REG  DDRD
00227 #elif (SBBI1_RST1_AVRPORT == AVRPORTE)
00228 #define SBBI1_RST1_SOD_REG PORTE
00229 #define SBBI1_RST1_OE_REG  DDRE
00230 #elif (SBBI1_RST1_AVRPORT == AVRPORTF)
00231 #define SBBI1_RST1_SOD_REG PORTF
00232 #define SBBI1_RST1_OE_REG  DDRF
00233 #elif (SBBI1_RST1_AVRPORT == AVRPORTG)
00234 #define SBBI1_RST1_SOD_REG PORTG
00235 #define SBBI1_RST1_OE_REG  DDRG
00236 #elif (SBBI1_RST1_AVRPORT == AVRPORTH)
00237 #define SBBI1_RST1_SOD_REG PORTH
00238 #define SBBI1_RST1_OE_REG  DDRH
00239 #endif
00240 
00242 #define SBBI1_RST1_ENA()      sbi(SBBI1_RST1_OE_REG, SBBI1_RST1_BIT)
00243 
00244 #define SBBI1_RST1_CLR()      cbi(SBBI1_RST1_SOD_REG, SBBI1_RST1_BIT)
00245 
00246 #define SBBI1_RST1_SET()      sbi(SBBI1_RST1_SOD_REG, SBBI1_RST1_BIT)
00247 
00248 #endif                          /* SBBI1_RST1_BIT */
00249 
00250 #ifdef SBBI1_RST2_BIT
00251 
00252 #if (SBBI1_RST2_AVRPORT == AVRPORTB)
00253 #define SBBI1_RST2_SOD_REG PORTB
00254 #define SBBI1_RST2_OE_REG  DDRB
00255 #elif (SBBI1_RST2_AVRPORT == AVRPORTD)
00256 #define SBBI1_RST2_SOD_REG PORTD
00257 #define SBBI1_RST2_OE_REG  DDRD
00258 #elif (SBBI1_RST2_AVRPORT == AVRPORTE)
00259 #define SBBI1_RST2_SOD_REG PORTE
00260 #define SBBI1_RST2_OE_REG  DDRE
00261 #elif (SBBI1_RST2_AVRPORT == AVRPORTF)
00262 #define SBBI1_RST2_SOD_REG PORTF
00263 #define SBBI1_RST2_OE_REG  DDRF
00264 #elif (SBBI1_RST2_AVRPORT == AVRPORTG)
00265 #define SBBI1_RST2_SOD_REG PORTG
00266 #define SBBI1_RST2_OE_REG  DDRG
00267 #elif (SBBI1_RST2_AVRPORT == AVRPORTH)
00268 #define SBBI1_RST2_SOD_REG PORTH
00269 #define SBBI1_RST2_OE_REG  DDRH
00270 #endif
00271 
00273 #define SBBI1_RST2_ENA()      sbi(SBBI1_RST2_OE_REG, SBBI1_RST2_BIT)
00274 
00275 #define SBBI1_RST2_CLR()      cbi(SBBI1_RST2_SOD_REG, SBBI1_RST2_BIT)
00276 
00277 #define SBBI1_RST2_SET()      sbi(SBBI1_RST2_SOD_REG, SBBI1_RST2_BIT)
00278 
00279 #endif                          /* SBBI1_RST2_BIT */
00280 
00281 #ifdef SBBI1_RST3_BIT
00282 
00283 #if (SBBI1_RST3_AVRPORT == AVRPORTB)
00284 #define SBBI1_RST3_SOD_REG PORTB
00285 #define SBBI1_RST3_OE_REG  DDRB
00286 #elif (SBBI1_RST3_AVRPORT == AVRPORTD)
00287 #define SBBI1_RST3_SOD_REG PORTD
00288 #define SBBI1_RST3_OE_REG  DDRD
00289 #elif (SBBI1_RST3_AVRPORT == AVRPORTE)
00290 #define SBBI1_RST3_SOD_REG PORTE
00291 #define SBBI1_RST3_OE_REG  DDRE
00292 #elif (SBBI1_RST3_AVRPORT == AVRPORTF)
00293 #define SBBI1_RST3_SOD_REG PORTF
00294 #define SBBI1_RST3_OE_REG  DDRF
00295 #elif (SBBI1_RST3_AVRPORT == AVRPORTG)
00296 #define SBBI1_RST3_SOD_REG PORTG
00297 #define SBBI1_RST3_OE_REG  DDRG
00298 #elif (SBBI1_RST3_AVRPORT == AVRPORTH)
00299 #define SBBI1_RST3_SOD_REG PORTH
00300 #define SBBI1_RST3_OE_REG  DDRH
00301 #endif
00302 
00304 #define SBBI1_RST3_ENA()      sbi(SBBI1_RST3_OE_REG, SBBI1_RST3_BIT)
00305 
00306 #define SBBI1_RST3_CLR()      cbi(SBBI1_RST3_SOD_REG, SBBI1_RST3_BIT)
00307 
00308 #define SBBI1_RST3_SET()      sbi(SBBI1_RST3_SOD_REG, SBBI1_RST3_BIT)
00309 
00310 #endif                          /* SBBI1_RST3_BIT */
00311 
00312 #ifdef SBBI1_SCK_BIT
00313 
00314 #if (SBBI1_SCK_AVRPORT == AVRPORTB)
00315 #define SBBI1_SCK_SOD_REG PORTB
00316 #define SBBI1_SCK_OE_REG  DDRB
00317 #elif (SBBI1_SCK_AVRPORT == AVRPORTD)
00318 #define SBBI1_SCK_SOD_REG PORTD
00319 #define SBBI1_SCK_OE_REG  DDRD
00320 #elif (SBBI1_SCK_AVRPORT == AVRPORTE)
00321 #define SBBI1_SCK_SOD_REG PORTE
00322 #define SBBI1_SCK_OE_REG  DDRE
00323 #elif (SBBI1_SCK_AVRPORT == AVRPORTF)
00324 #define SBBI1_SCK_SOD_REG PORTF
00325 #define SBBI1_SCK_OE_REG  DDRF
00326 #elif (SBBI1_SCK_AVRPORT == AVRPORTG)
00327 #define SBBI1_SCK_SOD_REG PORTG
00328 #define SBBI1_SCK_OE_REG  DDRG
00329 #elif (SBBI1_SCK_AVRPORT == AVRPORTH)
00330 #define SBBI1_SCK_SOD_REG PORTH
00331 #define SBBI1_SCK_OE_REG  DDRH
00332 #endif
00333 
00335 #define SBBI1_SCK_ENA()      sbi(SBBI1_SCK_OE_REG, SBBI1_SCK_BIT)
00336 
00337 #define SBBI1_SCK_CLR()      cbi(SBBI1_SCK_SOD_REG, SBBI1_SCK_BIT)
00338 
00339 #define SBBI1_SCK_SET()      sbi(SBBI1_SCK_SOD_REG, SBBI1_SCK_BIT)
00340 
00341 #if defined(SBBI1_MOSI_BIT)
00342 
00343 #if (SBBI1_MOSI_AVRPORT == AVRPORTB)
00344 #define SBBI1_MOSI_SOD_REG PORTB
00345 #define SBBI1_MOSI_OE_REG  DDRB
00346 #elif (SBBI1_MOSI_AVRPORT == AVRPORTD)
00347 #define SBBI1_MOSI_SOD_REG PORTD
00348 #define SBBI1_MOSI_OE_REG  DDRD
00349 #elif (SBBI1_MOSI_AVRPORT == AVRPORTE)
00350 #define SBBI1_MOSI_SOD_REG PORTE
00351 #define SBBI1_MOSI_OE_REG  DDRE
00352 #elif (SBBI1_MOSI_AVRPORT == AVRPORTF)
00353 #define SBBI1_MOSI_SOD_REG PORTF
00354 #define SBBI1_MOSI_OE_REG  DDRF
00355 #elif (SBBI1_MOSI_AVRPORT == AVRPORTG)
00356 #define SBBI1_MOSI_SOD_REG PORTG
00357 #define SBBI1_MOSI_OE_REG  DDRG
00358 #elif (SBBI1_MOSI_AVRPORT == AVRPORTH)
00359 #define SBBI1_MOSI_SOD_REG PORTH
00360 #define SBBI1_MOSI_OE_REG  DDRH
00361 #endif
00362 
00364 #define SBBI1_MOSI_ENA()      sbi(SBBI1_MOSI_OE_REG, SBBI1_MOSI_BIT)
00365 
00366 #define SBBI1_MOSI_CLR()      cbi(SBBI1_MOSI_SOD_REG, SBBI1_MOSI_BIT)
00367 
00368 #define SBBI1_MOSI_SET()      sbi(SBBI1_MOSI_SOD_REG, SBBI1_MOSI_BIT)
00369 
00370 #else                           /* SBBI1_MOSI_BIT */
00371 
00372 #define SBBI1_MOSI_ENA()
00373 #define SBBI1_MOSI_CLR()
00374 #define SBBI1_MOSI_SET()
00375 
00376 #endif                          /* SBBI1_MOSI_BIT */
00377 
00378 #if defined(SBBI1_MISO_BIT)
00379 
00380 #if (SBBI1_MISO_AVRPORT == AVRPORTB)
00381 #define SBBI1_MISO_PDS_REG PINB
00382 #define SBBI1_MISO_PUE_REG PORTB
00383 #define SBBI1_MISO_OE_REG  DDRB
00384 #elif (SBBI1_MISO_AVRPORT == AVRPORTD)
00385 #define SBBI1_MISO_PDS_REG PIND
00386 #define SBBI1_MISO_PUE_REG PORTD
00387 #define SBBI1_MISO_OE_REG  DDRD
00388 #elif (SBBI1_MISO_AVRPORT == AVRPORTE)
00389 #define SBBI1_MISO_PDS_REG PINE
00390 #define SBBI1_MISO_PUE_REG PORTE
00391 #define SBBI1_MISO_OE_REG  DDRE
00392 #elif (SBBI1_MISO_AVRPORT == AVRPORTF)
00393 #define SBBI1_MISO_PDS_REG PINF
00394 #define SBBI1_MISO_PUE_REG PORTF
00395 #define SBBI1_MISO_OE_REG  DDRF
00396 #elif (SBBI1_MISO_AVRPORT == AVRPORTG)
00397 #define SBBI1_MISO_PDS_REG PING
00398 #define SBBI1_MISO_PUE_REG PORTG
00399 #define SBBI1_MISO_OE_REG  DDRG
00400 #elif (SBBI1_MISO_AVRPORT == AVRPORTH)
00401 #define SBBI1_MISO_PDS_REG PINH
00402 #define SBBI1_MISO_PUE_REG PORTH
00403 #define SBBI1_MISO_OE_REG  DDRH
00404 #endif
00405 
00407 #define SBBI1_MISO_ENA() \
00408     cbi(SBBI1_MISO_OE_REG, SBBI1_MISO_BIT); \
00409     sbi(SBBI1_MISO_PUE_REG, SBBI1_MISO_BIT)
00410 
00411 #define SBBI1_MISO_TST()    ((inb(SBBI1_MISO_PDS_REG) & _BV(SBBI1_MISO_BIT)) == _BV(SBBI1_MISO_BIT))
00412 
00413 #else                           /* SBBI1_MISO_BIT */
00414 
00415 #define SBBI1_MISO_ENA()
00416 #define SBBI1_MISO_TST()   0
00417 
00418 #endif                          /* SBBI1_MISO_BIT */
00419 
00420 #endif                          /* SBBI1_SCK_BIT */
00421 
00422 #else                           /* MCU */
00423 /*
00424  * AT91 implementation.
00425  * ======================================
00426  */
00427 
00428 #ifdef SBBI1_CS0_BIT
00429 
00430 #if !defined(SBBI1_CS0_PIO_ID)
00431 #define SBBI1_CS0_PE_REG        PIO_PER
00432 #define SBBI1_CS0_OE_REG        PIO_OER
00433 #define SBBI1_CS0_COD_REG       PIO_CODR
00434 #define SBBI1_CS0_SOD_REG       PIO_SODR
00435 #elif SBBI1_CS0_PIO_ID == PIOA_ID
00436 #define SBBI1_CS0_PE_REG        PIOA_PER
00437 #define SBBI1_CS0_OE_REG        PIOA_OER
00438 #define SBBI1_CS0_COD_REG       PIOA_CODR
00439 #define SBBI1_CS0_SOD_REG       PIOA_SODR
00440 #elif SBBI1_CS0_PIO_ID == PIOB_ID
00441 #define SBBI1_CS0_PE_REG        PIOB_PER
00442 #define SBBI1_CS0_OE_REG        PIOB_OER
00443 #define SBBI1_CS0_COD_REG       PIOB_CODR
00444 #define SBBI1_CS0_SOD_REG       PIOB_SODR
00445 #elif SBBI1_CS0_PIO_ID == PIOC_ID
00446 #define SBBI1_CS0_PE_REG        PIOC_PER
00447 #define SBBI1_CS0_OE_REG        PIOC_OER
00448 #define SBBI1_CS0_COD_REG       PIOC_CODR
00449 #define SBBI1_CS0_SOD_REG       PIOC_SODR
00450 #endif
00451 
00453 #define SBBI1_CS0_ENA() \
00454     outr(SBBI1_CS0_PE_REG, _BV(SBBI1_CS0_BIT)); \
00455     outr(SBBI1_CS0_OE_REG, _BV(SBBI1_CS0_BIT))
00456 
00457 #define SBBI1_CS0_CLR()   outr(SBBI1_CS0_COD_REG, _BV(SBBI1_CS0_BIT))
00458 
00459 #define SBBI1_CS0_SET()   outr(SBBI1_CS0_SOD_REG, _BV(SBBI1_CS0_BIT))
00460 
00461 #endif                          /* SBBI1_CS0_BIT */
00462 
00463 #ifdef SBBI1_CS1_BIT
00464 
00465 #if !defined(SBBI1_CS1_PIO_ID)
00466 #define SBBI1_CS1_PE_REG        PIO_PER
00467 #define SBBI1_CS1_OE_REG        PIO_OER
00468 #define SBBI1_CS1_COD_REG       PIO_CODR
00469 #define SBBI1_CS1_SOD_REG       PIO_SODR
00470 #elif SBBI1_CS1_PIO_ID == PIOA_ID
00471 #define SBBI1_CS1_PE_REG        PIOA_PER
00472 #define SBBI1_CS1_OE_REG        PIOA_OER
00473 #define SBBI1_CS1_COD_REG       PIOA_CODR
00474 #define SBBI1_CS1_SOD_REG       PIOA_SODR
00475 #elif SBBI1_CS1_PIO_ID == PIOB_ID
00476 #define SBBI1_CS1_PE_REG        PIOB_PER
00477 #define SBBI1_CS1_OE_REG        PIOB_OER
00478 #define SBBI1_CS1_COD_REG       PIOB_CODR
00479 #define SBBI1_CS1_SOD_REG       PIOB_SODR
00480 #elif SBBI1_CS1_PIO_ID == PIOC_ID
00481 #define SBBI1_CS1_PE_REG        PIOC_PER
00482 #define SBBI1_CS1_OE_REG        PIOC_OER
00483 #define SBBI1_CS1_COD_REG       PIOC_CODR
00484 #define SBBI1_CS1_SOD_REG       PIOC_SODR
00485 #endif
00486 
00488 #define SBBI1_CS1_ENA() \
00489     outr(SBBI1_CS1_PE_REG, _BV(SBBI1_CS1_BIT)); \
00490     outr(SBBI1_CS1_OE_REG, _BV(SBBI1_CS1_BIT))
00491 
00492 #define SBBI1_CS1_CLR()   outr(SBBI1_CS1_COD_REG, _BV(SBBI1_CS1_BIT))
00493 
00494 #define SBBI1_CS1_SET()   outr(SBBI1_CS1_SOD_REG, _BV(SBBI1_CS1_BIT))
00495 
00496 #endif                          /* SBBI1_CS1_BIT */
00497 
00498 #ifdef SBBI1_CS2_BIT
00499 
00500 #if !defined(SBBI1_CS2_PIO_ID)
00501 #define SBBI1_CS2_PE_REG        PIO_PER
00502 #define SBBI1_CS2_OE_REG        PIO_OER
00503 #define SBBI1_CS2_COD_REG       PIO_CODR
00504 #define SBBI1_CS2_SOD_REG       PIO_SODR
00505 #elif SBBI1_CS2_PIO_ID == PIOA_ID
00506 #define SBBI1_CS2_PE_REG        PIOA_PER
00507 #define SBBI1_CS2_OE_REG        PIOA_OER
00508 #define SBBI1_CS2_COD_REG       PIOA_CODR
00509 #define SBBI1_CS2_SOD_REG       PIOA_SODR
00510 #elif SBBI1_CS2_PIO_ID == PIOB_ID
00511 #define SBBI1_CS2_PE_REG        PIOB_PER
00512 #define SBBI1_CS2_OE_REG        PIOB_OER
00513 #define SBBI1_CS2_COD_REG       PIOB_CODR
00514 #define SBBI1_CS2_SOD_REG       PIOB_SODR
00515 #elif SBBI1_CS2_PIO_ID == PIOC_ID
00516 #define SBBI1_CS2_PE_REG        PIOC_PER
00517 #define SBBI1_CS2_OE_REG        PIOC_OER
00518 #define SBBI1_CS2_COD_REG       PIOC_CODR
00519 #define SBBI1_CS2_SOD_REG       PIOC_SODR
00520 #endif
00521 
00523 #define SBBI1_CS2_ENA() \
00524     outr(SBBI1_CS2_PE_REG, _BV(SBBI1_CS2_BIT)); \
00525     outr(SBBI1_CS2_OE_REG, _BV(SBBI1_CS2_BIT))
00526 
00527 #define SBBI1_CS2_CLR()   outr(SBBI1_CS2_COD_REG, _BV(SBBI1_CS2_BIT))
00528 
00529 #define SBBI1_CS2_SET()   outr(SBBI1_CS2_SOD_REG, _BV(SBBI1_CS2_BIT))
00530 
00531 #endif                          /* SBBI1_CS2_BIT */
00532 
00533 #ifdef SBBI1_CS3_BIT
00534 
00535 #if !defined(SBBI1_CS3_PIO_ID)
00536 #define SBBI1_CS3_PE_REG        PIO_PER
00537 #define SBBI1_CS3_OE_REG        PIO_OER
00538 #define SBBI1_CS3_COD_REG       PIO_CODR
00539 #define SBBI1_CS3_SOD_REG       PIO_SODR
00540 #elif SBBI1_CS3_PIO_ID == PIOA_ID
00541 #define SBBI1_CS3_PE_REG        PIOA_PER
00542 #define SBBI1_CS3_OE_REG        PIOA_OER
00543 #define SBBI1_CS3_COD_REG       PIOA_CODR
00544 #define SBBI1_CS3_SOD_REG       PIOA_SODR
00545 #elif SBBI1_CS3_PIO_ID == PIOB_ID
00546 #define SBBI1_CS3_PE_REG        PIOB_PER
00547 #define SBBI1_CS3_OE_REG        PIOB_OER
00548 #define SBBI1_CS3_COD_REG       PIOB_CODR
00549 #define SBBI1_CS3_SOD_REG       PIOB_SODR
00550 #elif SBBI1_CS3_PIO_ID == PIOC_ID
00551 #define SBBI1_CS3_PE_REG        PIOC_PER
00552 #define SBBI1_CS3_OE_REG        PIOC_OER
00553 #define SBBI1_CS3_COD_REG       PIOC_CODR
00554 #define SBBI1_CS3_SOD_REG       PIOC_SODR
00555 #endif
00556 
00558 #define SBBI1_CS3_ENA() \
00559     outr(SBBI1_CS3_PE_REG, _BV(SBBI1_CS3_BIT)); \
00560     outr(SBBI1_CS3_OE_REG, _BV(SBBI1_CS3_BIT))
00561 
00562 #define SBBI1_CS3_CLR()   outr(SBBI1_CS3_COD_REG, _BV(SBBI1_CS3_BIT))
00563 
00564 #define SBBI1_CS3_SET()   outr(SBBI1_CS3_SOD_REG, _BV(SBBI1_CS3_BIT))
00565 
00566 #endif                          /* SBBI1_CS3_BIT */
00567 
00568 #ifdef SBBI1_RST0_BIT
00569 
00570 #if !defined(SBBI1_RST0_PIO_ID)
00571 #define SBBI1_RST0_PE_REG      PIO_PER
00572 #define SBBI1_RST0_OE_REG      PIO_OER
00573 #define SBBI1_RST0_COD_REG     PIO_CODR
00574 #define SBBI1_RST0_SOD_REG     PIO_SODR
00575 #elif SBBI1_RST0_PIO_ID == PIOA_ID
00576 #define SBBI1_RST0_PE_REG      PIOA_PER
00577 #define SBBI1_RST0_OE_REG      PIOA_OER
00578 #define SBBI1_RST0_COD_REG     PIOA_CODR
00579 #define SBBI1_RST0_SOD_REG     PIOA_SODR
00580 #elif SBBI1_RST0_PIO_ID == PIOB_ID
00581 #define SBBI1_RST0_PE_REG      PIOB_PER
00582 #define SBBI1_RST0_OE_REG      PIOB_OER
00583 #define SBBI1_RST0_COD_REG     PIOB_CODR
00584 #define SBBI1_RST0_SOD_REG     PIOB_SODR
00585 #elif SBBI1_RST0_PIO_ID == PIOC_ID
00586 #define SBBI1_RST0_PE_REG      PIOC_PER
00587 #define SBBI1_RST0_OE_REG      PIOC_OER
00588 #define SBBI1_RST0_COD_REG     PIOC_CODR
00589 #define SBBI1_RST0_SOD_REG     PIOC_SODR
00590 #endif
00591 
00593 #define SBBI1_RST0_ENA() \
00594     outr(SBBI1_RST0_PE_REG, _BV(SBBI1_RST0_BIT)); \
00595     outr(SBBI1_RST0_OE_REG, _BV(SBBI1_RST0_BIT))
00596 
00597 #define SBBI1_RST0_CLR()   outr(SBBI1_RST0_COD_REG, _BV(SBBI1_RST0_BIT))
00598 
00599 #define SBBI1_RST0_SET()   outr(SBBI1_RST0_SOD_REG, _BV(SBBI1_RST0_BIT))
00600 
00601 #endif                          /* SBBI1_RST0_BIT */
00602 
00603 #ifdef SBBI1_RST1_BIT
00604 
00605 #if !defined(SBBI1_RST1_PIO_ID)
00606 #define SBBI1_RST1_PE_REG      PIO_PER
00607 #define SBBI1_RST1_OE_REG      PIO_OER
00608 #define SBBI1_RST1_COD_REG     PIO_CODR
00609 #define SBBI1_RST1_SOD_REG     PIO_SODR
00610 #elif SBBI1_RST1_PIO_ID == PIOA_ID
00611 #define SBBI1_RST1_PE_REG      PIOA_PER
00612 #define SBBI1_RST1_OE_REG      PIOA_OER
00613 #define SBBI1_RST1_COD_REG     PIOA_CODR
00614 #define SBBI1_RST1_SOD_REG     PIOA_SODR
00615 #elif SBBI1_RST1_PIO_ID == PIOB_ID
00616 #define SBBI1_RST1_PE_REG      PIOB_PER
00617 #define SBBI1_RST1_OE_REG      PIOB_OER
00618 #define SBBI1_RST1_COD_REG     PIOB_CODR
00619 #define SBBI1_RST1_SOD_REG     PIOB_SODR
00620 #elif SBBI1_RST1_PIO_ID == PIOC_ID
00621 #define SBBI1_RST1_PE_REG      PIOC_PER
00622 #define SBBI1_RST1_OE_REG      PIOC_OER
00623 #define SBBI1_RST1_COD_REG     PIOC_CODR
00624 #define SBBI1_RST1_SOD_REG     PIOC_SODR
00625 #endif
00626 
00628 #define SBBI1_RST1_ENA() \
00629     outr(SBBI1_RST1_PE_REG, _BV(SBBI1_RST1_BIT)); \
00630     outr(SBBI1_RST1_OE_REG, _BV(SBBI1_RST1_BIT))
00631 
00632 #define SBBI1_RST1_CLR()   outr(SBBI1_RST1_COD_REG, _BV(SBBI1_RST1_BIT))
00633 
00634 #define SBBI1_RST1_SET()   outr(SBBI1_RST1_SOD_REG, _BV(SBBI1_RST1_BIT))
00635 
00636 #endif                          /* SBBI1_RST1_BIT */
00637 
00638 #ifdef SBBI1_RST2_BIT
00639 
00640 #if !defined(SBBI1_RST2_PIO_ID)
00641 #define SBBI1_RST2_PE_REG      PIO_PER
00642 #define SBBI1_RST2_OE_REG      PIO_OER
00643 #define SBBI1_RST2_COD_REG     PIO_CODR
00644 #define SBBI1_RST2_SOD_REG     PIO_SODR
00645 #elif SBBI1_RST2_PIO_ID == PIOA_ID
00646 #define SBBI1_RST2_PE_REG      PIOA_PER
00647 #define SBBI1_RST2_OE_REG      PIOA_OER
00648 #define SBBI1_RST2_COD_REG     PIOA_CODR
00649 #define SBBI1_RST2_SOD_REG     PIOA_SODR
00650 #elif SBBI1_RST2_PIO_ID == PIOB_ID
00651 #define SBBI1_RST2_PE_REG      PIOB_PER
00652 #define SBBI1_RST2_OE_REG      PIOB_OER
00653 #define SBBI1_RST2_COD_REG     PIOB_CODR
00654 #define SBBI1_RST2_SOD_REG     PIOB_SODR
00655 #elif SBBI1_RST2_PIO_ID == PIOC_ID
00656 #define SBBI1_RST2_PE_REG      PIOC_PER
00657 #define SBBI1_RST2_OE_REG      PIOC_OER
00658 #define SBBI1_RST2_COD_REG     PIOC_CODR
00659 #define SBBI1_RST2_SOD_REG     PIOC_SODR
00660 #endif
00661 
00663 #define SBBI1_RST2_ENA() \
00664     outr(SBBI1_RST2_PE_REG, _BV(SBBI1_RST2_BIT)); \
00665     outr(SBBI1_RST2_OE_REG, _BV(SBBI1_RST2_BIT))
00666 
00667 #define SBBI1_RST2_CLR()   outr(SBBI1_RST2_COD_REG, _BV(SBBI1_RST2_BIT))
00668 
00669 #define SBBI1_RST2_SET()   outr(SBBI1_RST2_SOD_REG, _BV(SBBI1_RST2_BIT))
00670 
00671 #endif                          /* SBBI1_RST2_BIT */
00672 
00673 #ifdef SBBI1_RST3_BIT
00674 
00675 #if !defined(SBBI1_RST3_PIO_ID)
00676 #define SBBI1_RST3_PE_REG      PIO_PER
00677 #define SBBI1_RST3_OE_REG      PIO_OER
00678 #define SBBI1_RST3_COD_REG     PIO_CODR
00679 #define SBBI1_RST3_SOD_REG     PIO_SODR
00680 #elif SBBI1_RST3_PIO_ID == PIOA_ID
00681 #define SBBI1_RST3_PE_REG      PIOA_PER
00682 #define SBBI1_RST3_OE_REG      PIOA_OER
00683 #define SBBI1_RST3_COD_REG     PIOA_CODR
00684 #define SBBI1_RST3_SOD_REG     PIOA_SODR
00685 #elif SBBI1_RST3_PIO_ID == PIOB_ID
00686 #define SBBI1_RST3_PE_REG      PIOB_PER
00687 #define SBBI1_RST3_OE_REG      PIOB_OER
00688 #define SBBI1_RST3_COD_REG     PIOB_CODR
00689 #define SBBI1_RST3_SOD_REG     PIOB_SODR
00690 #elif SBBI1_RST3_PIO_ID == PIOC_ID
00691 #define SBBI1_RST3_PE_REG      PIOC_PER
00692 #define SBBI1_RST3_OE_REG      PIOC_OER
00693 #define SBBI1_RST3_COD_REG     PIOC_CODR
00694 #define SBBI1_RST3_SOD_REG     PIOC_SODR
00695 #endif
00696 
00698 #define SBBI1_RST3_ENA() \
00699     outr(SBBI1_RST3_PE_REG, _BV(SBBI1_RST3_BIT)); \
00700     outr(SBBI1_RST3_OE_REG, _BV(SBBI1_RST3_BIT))
00701 
00702 #define SBBI1_RST3_CLR()   outr(SBBI1_RST3_COD_REG, _BV(SBBI1_RST3_BIT))
00703 
00704 #define SBBI1_RST3_SET()   outr(SBBI1_RST3_SOD_REG, _BV(SBBI1_RST3_BIT))
00705 
00706 #endif                          /* SBBI1_RST3_BIT */
00707 
00708 #ifdef SBBI1_SCK_BIT
00709 
00710 #if !defined(SBBI1_SCK_PIO_ID)
00711 #define SBBI1_SCK_PE_REG        PIO_PER
00712 #define SBBI1_SCK_OE_REG        PIO_OER
00713 #define SBBI1_SCK_COD_REG       PIO_CODR
00714 #define SBBI1_SCK_SOD_REG       PIO_SODR
00715 #elif SBBI1_SCK_PIO_ID == PIOA_ID
00716 #define SBBI1_SCK_PE_REG        PIOA_PER
00717 #define SBBI1_SCK_OE_REG        PIOA_OER
00718 #define SBBI1_SCK_COD_REG       PIOA_CODR
00719 #define SBBI1_SCK_SOD_REG       PIOA_SODR
00720 #elif SBBI1_SCK_PIO_ID == PIOB_ID
00721 #define SBBI1_SCK_PE_REG        PIOB_PER
00722 #define SBBI1_SCK_OE_REG        PIOB_OER
00723 #define SBBI1_SCK_COD_REG       PIOB_CODR
00724 #define SBBI1_SCK_SOD_REG       PIOB_SODR
00725 #elif SBBI1_SCK_PIO_ID == PIOC_ID
00726 #define SBBI1_SCK_PE_REG        PIOC_PER
00727 #define SBBI1_SCK_OE_REG        PIOC_OER
00728 #define SBBI1_SCK_COD_REG       PIOC_CODR
00729 #define SBBI1_SCK_SOD_REG       PIOC_SODR
00730 #endif
00731 
00733 #define SBBI1_SCK_ENA() \
00734     outr(SBBI1_SCK_PE_REG, _BV(SBBI1_SCK_BIT)); \
00735     outr(SBBI1_SCK_OE_REG, _BV(SBBI1_SCK_BIT))
00736 
00737 #define SBBI1_SCK_CLR()     outr(SBBI1_SCK_COD_REG, _BV(SBBI1_SCK_BIT))
00738 
00739 #define SBBI1_SCK_SET()     outr(SBBI1_SCK_SOD_REG, _BV(SBBI1_SCK_BIT))
00740 
00741 #ifdef SBBI1_MOSI_BIT
00742 
00743 #if !defined(SBBI1_MOSI_PIO_ID)
00744 #define SBBI1_MOSI_PE_REG       PIO_PER
00745 #define SBBI1_MOSI_OE_REG       PIO_OER
00746 #define SBBI1_MOSI_COD_REG      PIO_CODR
00747 #define SBBI1_MOSI_SOD_REG      PIO_SODR
00748 #elif SBBI1_MOSI_PIO_ID == PIOA_ID
00749 #define SBBI1_MOSI_PE_REG       PIOA_PER
00750 #define SBBI1_MOSI_OE_REG       PIOA_OER
00751 #define SBBI1_MOSI_COD_REG      PIOA_CODR
00752 #define SBBI1_MOSI_SOD_REG      PIOA_SODR
00753 #elif SBBI1_MOSI_PIO_ID == PIOB_ID
00754 #define SBBI1_MOSI_PE_REG       PIOB_PER
00755 #define SBBI1_MOSI_OE_REG       PIOB_OER
00756 #define SBBI1_MOSI_COD_REG      PIOB_CODR
00757 #define SBBI1_MOSI_SOD_REG      PIOB_SODR
00758 #elif SBBI1_MOSI_PIO_ID == PIOC_ID
00759 #define SBBI1_MOSI_PE_REG       PIOC_PER
00760 #define SBBI1_MOSI_OE_REG       PIOC_OER
00761 #define SBBI1_MOSI_COD_REG      PIOC_CODR
00762 #define SBBI1_MOSI_SOD_REG      PIOC_SODR
00763 #endif
00764 
00766 #define SBBI1_MOSI_ENA() \
00767     outr(SBBI1_MOSI_PE_REG, _BV(SBBI1_MOSI_BIT)); \
00768     outr(SBBI1_MOSI_OE_REG, _BV(SBBI1_MOSI_BIT))
00769 
00770 #define SBBI1_MOSI_CLR()    outr(SBBI1_MOSI_COD_REG, _BV(SBBI1_MOSI_BIT))
00771 
00772 #define SBBI1_MOSI_SET()    outr(SBBI1_MOSI_SOD_REG, _BV(SBBI1_MOSI_BIT))
00773 
00774 #else                           /* SBBI1_MOSI_BIT */
00775 
00776 #define SBBI1_MOSI_ENA()
00777 #define SBBI1_MOSI_CLR()
00778 #define SBBI1_MOSI_SET()
00779 
00780 #endif                          /* SBBI1_MOSI_BIT */
00781 
00782 #ifdef SBBI1_MISO_BIT
00783 
00784 #if !defined(SBBI1_MISO_PIO_ID)
00785 #define SBBI1_MISO_PE_REG       PIO_PER
00786 #define SBBI1_MISO_OD_REG       PIO_ODR
00787 #define SBBI1_MISO_PDS_REG      PIO_PDSR
00788 #elif SBBI1_MISO_PIO_ID == PIOA_ID
00789 #define SBBI1_MISO_PE_REG       PIOA_PER
00790 #define SBBI1_MISO_OD_REG       PIOA_ODR
00791 #define SBBI1_MISO_PDS_REG      PIOA_PDSR
00792 #elif SBBI1_MISO_PIO_ID == PIOB_ID
00793 #define SBBI1_MISO_PE_REG       PIOB_PER
00794 #define SBBI1_MISO_OD_REG       PIOB_ODR
00795 #define SBBI1_MISO_PDS_REG      PIOB_PDSR
00796 #elif SBBI1_MISO_PIO_ID == PIOC_ID
00797 #define SBBI1_MISO_PE_REG       PIOC_PER
00798 #define SBBI1_MISO_OD_REG       PIOC_ODR
00799 #define SBBI1_MISO_PDS_REG      PIOC_PDSR
00800 #endif
00801 
00803 #define SBBI1_MISO_ENA() \
00804     outr(SBBI1_MISO_PE_REG, _BV(SBBI1_MISO_BIT)); \
00805     outr(SBBI1_MISO_OD_REG, _BV(SBBI1_MISO_BIT))
00806 
00807 #define SBBI1_MISO_TST()    ((inr(SBBI1_MISO_PDS_REG) & _BV(SBBI1_MISO_BIT)) == _BV(SBBI1_MISO_BIT))
00808 
00809 #else                           /* SBBI1_MISO_BIT */
00810 
00811 #define SBBI1_MISO_ENA()
00812 #define SBBI1_MISO_TST()   0
00813 
00814 #endif                          /* SBBI1_MISO_BIT */
00815 
00816 #endif                          /* SBBI1_SCK_BIT */
00817 
00818 #endif                          /* MCU */
00819 
00820 #define SBBI1_INIT() \
00821 { \
00822     SBBI1_SCK_CLR(); \
00823     SBBI1_SCK_ENA(); \
00824     SBBI1_MOSI_CLR(); \
00825     SBBI1_MOSI_ENA(); \
00826     SBBI1_MISO_ENA(); \
00827 }
00828 
00829 #endif

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