00001 #ifndef _DEV_SBBIF0_H_
00002 #define _DEV_SBBIF0_H_
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00049 #include <cfg/arch/gpio.h>
00050
00054 #ifndef SBBI0_MAX_DEVICES
00055 #define SBBI0_MAX_DEVICES 4
00056 #endif
00057
00058 #if defined(__AVR__)
00059
00060
00061
00062
00063
00064 #ifdef SBBI0_CS0_BIT
00065
00066 #if (SBBI0_CS0_AVRPORT == AVRPORTB)
00067 #define SBBI0_CS0_SOD_REG PORTB
00068 #define SBBI0_CS0_OE_REG DDRB
00069 #elif (SBBI0_CS0_AVRPORT == AVRPORTD)
00070 #define SBBI0_CS0_SOD_REG PORTD
00071 #define SBBI0_CS0_OE_REG DDRD
00072 #elif (SBBI0_CS0_AVRPORT == AVRPORTE)
00073 #define SBBI0_CS0_SOD_REG PORTE
00074 #define SBBI0_CS0_OE_REG DDRE
00075 #elif (SBBI0_CS0_AVRPORT == AVRPORTF)
00076 #define SBBI0_CS0_SOD_REG PORTF
00077 #define SBBI0_CS0_OE_REG DDRF
00078 #elif (SBBI0_CS0_AVRPORT == AVRPORTG)
00079 #define SBBI0_CS0_SOD_REG PORTG
00080 #define SBBI0_CS0_OE_REG DDRG
00081 #elif (SBBI0_CS0_AVRPORT == AVRPORTH)
00082 #define SBBI0_CS0_SOD_REG PORTH
00083 #define SBBI0_CS0_OE_REG DDRH
00084 #endif
00085
00087 #define SBBI0_CS0_ENA() sbi(SBBI0_CS0_OE_REG, SBBI0_CS0_BIT)
00088
00089 #define SBBI0_CS0_CLR() cbi(SBBI0_CS0_SOD_REG, SBBI0_CS0_BIT)
00090
00091 #define SBBI0_CS0_SET() sbi(SBBI0_CS0_SOD_REG, SBBI0_CS0_BIT)
00092
00093 #else
00094
00095 #define SBBI0_CS0_ENA()
00096 #define SBBI0_CS0_CLR()
00097 #define SBBI0_CS0_SET()
00098
00099 #endif
00100
00101 #ifdef SBBI0_CS1_BIT
00102
00103 #if (SBBI0_CS1_AVRPORT == AVRPORTB)
00104 #define SBBI0_CS1_SOD_REG PORTB
00105 #define SBBI0_CS1_OE_REG DDRB
00106 #elif (SBBI0_CS1_AVRPORT == AVRPORTD)
00107 #define SBBI0_CS1_SOD_REG PORTD
00108 #define SBBI0_CS1_OE_REG DDRD
00109 #elif (SBBI0_CS1_AVRPORT == AVRPORTE)
00110 #define SBBI0_CS1_SOD_REG PORTE
00111 #define SBBI0_CS1_OE_REG DDRE
00112 #elif (SBBI0_CS1_AVRPORT == AVRPORTF)
00113 #define SBBI0_CS1_SOD_REG PORTF
00114 #define SBBI0_CS1_OE_REG DDRF
00115 #elif (SBBI0_CS1_AVRPORT == AVRPORTG)
00116 #define SBBI0_CS1_SOD_REG PORTG
00117 #define SBBI0_CS1_OE_REG DDRG
00118 #elif (SBBI0_CS1_AVRPORT == AVRPORTH)
00119 #define SBBI0_CS1_SOD_REG PORTH
00120 #define SBBI0_CS1_OE_REG DDRH
00121 #endif
00122
00124 #define SBBI0_CS1_ENA() sbi(SBBI0_CS1_OE_REG, SBBI0_CS1_BIT)
00125
00126 #define SBBI0_CS1_CLR() cbi(SBBI0_CS1_SOD_REG, SBBI0_CS1_BIT)
00127
00128 #define SBBI0_CS1_SET() sbi(SBBI0_CS1_SOD_REG, SBBI0_CS1_BIT)
00129
00130 #else
00131
00132 #define SBBI0_CS1_ENA()
00133 #define SBBI0_CS1_CLR()
00134 #define SBBI0_CS1_SET()
00135
00136 #endif
00137
00138 #ifdef SBBI0_CS2_BIT
00139
00140 #if (SBBI0_CS2_AVRPORT == AVRPORTB)
00141 #define SBBI0_CS2_SOD_REG PORTB
00142 #define SBBI0_CS2_OE_REG DDRB
00143 #elif (SBBI0_CS2_AVRPORT == AVRPORTD)
00144 #define SBBI0_CS2_SOD_REG PORTD
00145 #define SBBI0_CS2_OE_REG DDRD
00146 #elif (SBBI0_CS2_AVRPORT == AVRPORTE)
00147 #define SBBI0_CS2_SOD_REG PORTE
00148 #define SBBI0_CS2_OE_REG DDRE
00149 #elif (SBBI0_CS2_AVRPORT == AVRPORTF)
00150 #define SBBI0_CS2_SOD_REG PORTF
00151 #define SBBI0_CS2_OE_REG DDRF
00152 #elif (SBBI0_CS2_AVRPORT == AVRPORTG)
00153 #define SBBI0_CS2_SOD_REG PORTG
00154 #define SBBI0_CS2_OE_REG DDRG
00155 #elif (SBBI0_CS2_AVRPORT == AVRPORTH)
00156 #define SBBI0_CS2_SOD_REG PORTH
00157 #define SBBI0_CS2_OE_REG DDRH
00158 #endif
00159
00161 #define SBBI0_CS2_ENA() sbi(SBBI0_CS2_OE_REG, SBBI0_CS2_BIT)
00162
00163 #define SBBI0_CS2_CLR() cbi(SBBI0_CS2_SOD_REG, SBBI0_CS2_BIT)
00164
00165 #define SBBI0_CS2_SET() sbi(SBBI0_CS2_SOD_REG, SBBI0_CS2_BIT)
00166
00167 #else
00168
00169 #define SBBI0_CS2_ENA()
00170 #define SBBI0_CS2_CLR()
00171 #define SBBI0_CS2_SET()
00172
00173 #endif
00174
00175 #ifdef SBBI0_CS3_BIT
00176
00177 #if (SBBI0_CS3_AVRPORT == AVRPORTB)
00178 #define SBBI0_CS3_SOD_REG PORTB
00179 #define SBBI0_CS3_OE_REG DDRB
00180 #elif (SBBI0_CS3_AVRPORT == AVRPORTD)
00181 #define SBBI0_CS3_SOD_REG PORTD
00182 #define SBBI0_CS3_OE_REG DDRD
00183 #elif (SBBI0_CS3_AVRPORT == AVRPORTE)
00184 #define SBBI0_CS3_SOD_REG PORTE
00185 #define SBBI0_CS3_OE_REG DDRE
00186 #elif (SBBI0_CS3_AVRPORT == AVRPORTF)
00187 #define SBBI0_CS3_SOD_REG PORTF
00188 #define SBBI0_CS3_OE_REG DDRF
00189 #elif (SBBI0_CS3_AVRPORT == AVRPORTG)
00190 #define SBBI0_CS3_SOD_REG PORTG
00191 #define SBBI0_CS3_OE_REG DDRG
00192 #elif (SBBI0_CS3_AVRPORT == AVRPORTH)
00193 #define SBBI0_CS3_SOD_REG PORTH
00194 #define SBBI0_CS3_OE_REG DDRH
00195 #endif
00196
00198 #define SBBI0_CS3_ENA() sbi(SBBI0_CS3_OE_REG, SBBI0_CS3_BIT)
00199
00200 #define SBBI0_CS3_CLR() cbi(SBBI0_CS3_SOD_REG, SBBI0_CS3_BIT)
00201
00202 #define SBBI0_CS3_SET() sbi(SBBI0_CS3_SOD_REG, SBBI0_CS3_BIT)
00203
00204 #else
00205
00206 #define SBBI0_CS3_ENA()
00207 #define SBBI0_CS3_CLR()
00208 #define SBBI0_CS3_SET()
00209
00210 #endif
00211
00212 #ifdef SBBI0_RST0_BIT
00213
00214 #if (SBBI0_RST0_AVRPORT == AVRPORTB)
00215 #define SBBI0_RST0_SOD_REG PORTB
00216 #define SBBI0_RST0_OE_REG DDRB
00217 #elif (SBBI0_RST0_AVRPORT == AVRPORTD)
00218 #define SBBI0_RST0_SOD_REG PORTD
00219 #define SBBI0_RST0_OE_REG DDRD
00220 #elif (SBBI0_RST0_AVRPORT == AVRPORTE)
00221 #define SBBI0_RST0_SOD_REG PORTE
00222 #define SBBI0_RST0_OE_REG DDRE
00223 #elif (SBBI0_RST0_AVRPORT == AVRPORTF)
00224 #define SBBI0_RST0_SOD_REG PORTF
00225 #define SBBI0_RST0_OE_REG DDRF
00226 #elif (SBBI0_RST0_AVRPORT == AVRPORTG)
00227 #define SBBI0_RST0_SOD_REG PORTG
00228 #define SBBI0_RST0_OE_REG DDRG
00229 #elif (SBBI0_RST0_AVRPORT == AVRPORTH)
00230 #define SBBI0_RST0_SOD_REG PORTH
00231 #define SBBI0_RST0_OE_REG DDRH
00232 #endif
00233
00235 #define SBBI0_RST0_ENA() sbi(SBBI0_RST0_OE_REG, SBBI0_RST0_BIT)
00236
00237 #define SBBI0_RST0_CLR() cbi(SBBI0_RST0_SOD_REG, SBBI0_RST0_BIT)
00238
00239 #define SBBI0_RST0_SET() sbi(SBBI0_RST0_SOD_REG, SBBI0_RST0_BIT)
00240
00241 #else
00242
00243 #define SBBI0_RST0_ENA()
00244 #define SBBI0_RST0_CLR()
00245 #define SBBI0_RST0_SET()
00246
00247 #endif
00248
00249 #ifdef SBBI0_RST1_BIT
00250
00251 #if (SBBI0_RST1_AVRPORT == AVRPORTB)
00252 #define SBBI0_RST1_SOD_REG PORTB
00253 #define SBBI0_RST1_OE_REG DDRB
00254 #elif (SBBI0_RST1_AVRPORT == AVRPORTD)
00255 #define SBBI0_RST1_SOD_REG PORTD
00256 #define SBBI0_RST1_OE_REG DDRD
00257 #elif (SBBI0_RST1_AVRPORT == AVRPORTE)
00258 #define SBBI0_RST1_SOD_REG PORTE
00259 #define SBBI0_RST1_OE_REG DDRE
00260 #elif (SBBI0_RST1_AVRPORT == AVRPORTF)
00261 #define SBBI0_RST1_SOD_REG PORTF
00262 #define SBBI0_RST1_OE_REG DDRF
00263 #elif (SBBI0_RST1_AVRPORT == AVRPORTG)
00264 #define SBBI0_RST1_SOD_REG PORTG
00265 #define SBBI0_RST1_OE_REG DDRG
00266 #elif (SBBI0_RST1_AVRPORT == AVRPORTH)
00267 #define SBBI0_RST1_SOD_REG PORTH
00268 #define SBBI0_RST1_OE_REG DDRH
00269 #endif
00270
00272 #define SBBI0_RST1_ENA() sbi(SBBI0_RST1_OE_REG, SBBI0_RST1_BIT)
00273
00274 #define SBBI0_RST1_CLR() cbi(SBBI0_RST1_SOD_REG, SBBI0_RST1_BIT)
00275
00276 #define SBBI0_RST1_SET() sbi(SBBI0_RST1_SOD_REG, SBBI0_RST1_BIT)
00277
00278 #else
00279
00280 #define SBBI0_RST1_ENA()
00281 #define SBBI0_RST1_CLR()
00282 #define SBBI0_RST1_SET()
00283
00284 #endif
00285
00286 #ifdef SBBI0_RST2_BIT
00287
00288 #if (SBBI0_RST2_AVRPORT == AVRPORTB)
00289 #define SBBI0_RST2_SOD_REG PORTB
00290 #define SBBI0_RST2_OE_REG DDRB
00291 #elif (SBBI0_RST2_AVRPORT == AVRPORTD)
00292 #define SBBI0_RST2_SOD_REG PORTD
00293 #define SBBI0_RST2_OE_REG DDRD
00294 #elif (SBBI0_RST2_AVRPORT == AVRPORTE)
00295 #define SBBI0_RST2_SOD_REG PORTE
00296 #define SBBI0_RST2_OE_REG DDRE
00297 #elif (SBBI0_RST2_AVRPORT == AVRPORTF)
00298 #define SBBI0_RST2_SOD_REG PORTF
00299 #define SBBI0_RST2_OE_REG DDRF
00300 #elif (SBBI0_RST2_AVRPORT == AVRPORTG)
00301 #define SBBI0_RST2_SOD_REG PORTG
00302 #define SBBI0_RST2_OE_REG DDRG
00303 #elif (SBBI0_RST2_AVRPORT == AVRPORTH)
00304 #define SBBI0_RST2_SOD_REG PORTH
00305 #define SBBI0_RST2_OE_REG DDRH
00306 #endif
00307
00309 #define SBBI0_RST2_ENA() sbi(SBBI0_RST2_OE_REG, SBBI0_RST2_BIT)
00310
00311 #define SBBI0_RST2_CLR() cbi(SBBI0_RST2_SOD_REG, SBBI0_RST2_BIT)
00312
00313 #define SBBI0_RST2_SET() sbi(SBBI0_RST2_SOD_REG, SBBI0_RST2_BIT)
00314
00315 #else
00316
00317 #define SBBI0_RST2_ENA()
00318 #define SBBI0_RST2_CLR()
00319 #define SBBI0_RST2_SET()
00320
00321 #endif
00322
00323 #ifdef SBBI0_RST3_BIT
00324
00325 #if (SBBI0_RST3_AVRPORT == AVRPORTB)
00326 #define SBBI0_RST3_SOD_REG PORTB
00327 #define SBBI0_RST3_OE_REG DDRB
00328 #elif (SBBI0_RST3_AVRPORT == AVRPORTD)
00329 #define SBBI0_RST3_SOD_REG PORTD
00330 #define SBBI0_RST3_OE_REG DDRD
00331 #elif (SBBI0_RST3_AVRPORT == AVRPORTE)
00332 #define SBBI0_RST3_SOD_REG PORTE
00333 #define SBBI0_RST3_OE_REG DDRE
00334 #elif (SBBI0_RST3_AVRPORT == AVRPORTF)
00335 #define SBBI0_RST3_SOD_REG PORTF
00336 #define SBBI0_RST3_OE_REG DDRF
00337 #elif (SBBI0_RST3_AVRPORT == AVRPORTG)
00338 #define SBBI0_RST3_SOD_REG PORTG
00339 #define SBBI0_RST3_OE_REG DDRG
00340 #elif (SBBI0_RST3_AVRPORT == AVRPORTH)
00341 #define SBBI0_RST3_SOD_REG PORTH
00342 #define SBBI0_RST3_OE_REG DDRH
00343 #endif
00344
00346 #define SBBI0_RST3_ENA() sbi(SBBI0_RST3_OE_REG, SBBI0_RST3_BIT)
00347
00348 #define SBBI0_RST3_CLR() cbi(SBBI0_RST3_SOD_REG, SBBI0_RST3_BIT)
00349
00350 #define SBBI0_RST3_SET() sbi(SBBI0_RST3_SOD_REG, SBBI0_RST3_BIT)
00351
00352 #else
00353
00354 #define SBBI0_RST3_ENA()
00355 #define SBBI0_RST3_CLR()
00356 #define SBBI0_RST3_SET()
00357
00358 #endif
00359
00360 #ifdef SBBI0_SCK_BIT
00361
00362 #if (SBBI0_SCK_AVRPORT == AVRPORTB)
00363 #define SBBI0_SCK_SOD_REG PORTB
00364 #define SBBI0_SCK_OE_REG DDRB
00365 #elif (SBBI0_SCK_AVRPORT == AVRPORTD)
00366 #define SBBI0_SCK_SOD_REG PORTD
00367 #define SBBI0_SCK_OE_REG DDRD
00368 #elif (SBBI0_SCK_AVRPORT == AVRPORTE)
00369 #define SBBI0_SCK_SOD_REG PORTE
00370 #define SBBI0_SCK_OE_REG DDRE
00371 #elif (SBBI0_SCK_AVRPORT == AVRPORTF)
00372 #define SBBI0_SCK_SOD_REG PORTF
00373 #define SBBI0_SCK_OE_REG DDRF
00374 #elif (SBBI0_SCK_AVRPORT == AVRPORTG)
00375 #define SBBI0_SCK_SOD_REG PORTG
00376 #define SBBI0_SCK_OE_REG DDRG
00377 #elif (SBBI0_SCK_AVRPORT == AVRPORTH)
00378 #define SBBI0_SCK_SOD_REG PORTH
00379 #define SBBI0_SCK_OE_REG DDRH
00380 #endif
00381
00383 #define SBBI0_SCK_ENA() sbi(SBBI0_SCK_OE_REG, SBBI0_SCK_BIT)
00384
00385 #define SBBI0_SCK_CLR() cbi(SBBI0_SCK_SOD_REG, SBBI0_SCK_BIT)
00386
00387 #define SBBI0_SCK_SET() sbi(SBBI0_SCK_SOD_REG, SBBI0_SCK_BIT)
00388
00389 #if defined(SBBI0_MOSI_BIT)
00390
00391 #if (SBBI0_MOSI_AVRPORT == AVRPORTB)
00392 #define SBBI0_MOSI_SOD_REG PORTB
00393 #define SBBI0_MOSI_OE_REG DDRB
00394 #elif (SBBI0_MOSI_AVRPORT == AVRPORTD)
00395 #define SBBI0_MOSI_SOD_REG PORTD
00396 #define SBBI0_MOSI_OE_REG DDRD
00397 #elif (SBBI0_MOSI_AVRPORT == AVRPORTE)
00398 #define SBBI0_MOSI_SOD_REG PORTE
00399 #define SBBI0_MOSI_OE_REG DDRE
00400 #elif (SBBI0_MOSI_AVRPORT == AVRPORTF)
00401 #define SBBI0_MOSI_SOD_REG PORTF
00402 #define SBBI0_MOSI_OE_REG DDRF
00403 #elif (SBBI0_MOSI_AVRPORT == AVRPORTG)
00404 #define SBBI0_MOSI_SOD_REG PORTG
00405 #define SBBI0_MOSI_OE_REG DDRG
00406 #elif (SBBI0_MOSI_AVRPORT == AVRPORTH)
00407 #define SBBI0_MOSI_SOD_REG PORTH
00408 #define SBBI0_MOSI_OE_REG DDRH
00409 #endif
00410
00412 #define SBBI0_MOSI_ENA() sbi(SBBI0_MOSI_OE_REG, SBBI0_MOSI_BIT)
00413
00414 #define SBBI0_MOSI_CLR() cbi(SBBI0_MOSI_SOD_REG, SBBI0_MOSI_BIT)
00415
00416 #define SBBI0_MOSI_SET() sbi(SBBI0_MOSI_SOD_REG, SBBI0_MOSI_BIT)
00417
00418 #else
00419
00420 #define SBBI0_MOSI_ENA()
00421 #define SBBI0_MOSI_CLR()
00422 #define SBBI0_MOSI_SET()
00423
00424 #endif
00425
00426 #if defined(SBBI0_MISO_BIT)
00427
00428 #if (SBBI0_MISO_AVRPORT == AVRPORTB)
00429 #define SBBI0_MISO_PDS_REG PINB
00430 #define SBBI0_MISO_PUE_REG PORTB
00431 #define SBBI0_MISO_OE_REG DDRB
00432 #elif (SBBI0_MISO_AVRPORT == AVRPORTD)
00433 #define SBBI0_MISO_PDS_REG PIND
00434 #define SBBI0_MISO_PUE_REG PORTD
00435 #define SBBI0_MISO_OE_REG DDRD
00436 #elif (SBBI0_MISO_AVRPORT == AVRPORTE)
00437 #define SBBI0_MISO_PDS_REG PINE
00438 #define SBBI0_MISO_PUE_REG PORTE
00439 #define SBBI0_MISO_OE_REG DDRE
00440 #elif (SBBI0_MISO_AVRPORT == AVRPORTF)
00441 #define SBBI0_MISO_PDS_REG PINF
00442 #define SBBI0_MISO_PUE_REG PORTF
00443 #define SBBI0_MISO_OE_REG DDRF
00444 #elif (SBBI0_MISO_AVRPORT == AVRPORTG)
00445 #define SBBI0_MISO_PDS_REG PING
00446 #define SBBI0_MISO_PUE_REG PORTG
00447 #define SBBI0_MISO_OE_REG DDRG
00448 #elif (SBBI0_MISO_AVRPORT == AVRPORTH)
00449 #define SBBI0_MISO_PDS_REG PINH
00450 #define SBBI0_MISO_PUE_REG PORTH
00451 #define SBBI0_MISO_OE_REG DDRH
00452 #endif
00453
00455 #define SBBI0_MISO_ENA() \
00456 cbi(SBBI0_MISO_OE_REG, SBBI0_MISO_BIT); \
00457 sbi(SBBI0_MISO_PUE_REG, SBBI0_MISO_BIT)
00458
00459 #define SBBI0_MISO_TST() ((inb(SBBI0_MISO_PDS_REG) & _BV(SBBI0_MISO_BIT)) == _BV(SBBI0_MISO_BIT))
00460
00461 #else
00462
00463 #define SBBI0_MISO_ENA()
00464 #define SBBI0_MISO_TST() 0
00465
00466 #endif
00467
00468 #else
00469
00470 #define SBBI0_SCK_ENA()
00471 #define SBBI0_SCK_CLR()
00472 #define SBBI0_SCK_SET()
00473
00474 #define SBBI0_MOSI_ENA()
00475 #define SBBI0_MOSI_CLR()
00476 #define SBBI0_MOSI_SET()
00477
00478 #define SBBI0_MISO_ENA()
00479 #define SBBI0_MISO_TST() 0
00480
00481 #endif
00482
00483 #else
00484
00485
00486
00487
00488
00489 #ifdef SBBI0_CS0_BIT
00490
00491 #if !defined(SBBI0_CS0_PIO_ID)
00492 #define SBBI0_CS0_PE_REG PIO_PER
00493 #define SBBI0_CS0_OE_REG PIO_OER
00494 #define SBBI0_CS0_COD_REG PIO_CODR
00495 #define SBBI0_CS0_SOD_REG PIO_SODR
00496 #elif SBBI0_CS0_PIO_ID == PIO_ID
00497 #define SBBI0_CS0_PE_REG PIO_PER
00498 #define SBBI0_CS0_OE_REG PIO_OER
00499 #define SBBI0_CS0_COD_REG PIO_CODR
00500 #define SBBI0_CS0_SOD_REG PIO_SODR
00501 #elif SBBI0_CS0_PIO_ID == PIOA_ID
00502 #define SBBI0_CS0_PE_REG PIOA_PER
00503 #define SBBI0_CS0_OE_REG PIOA_OER
00504 #define SBBI0_CS0_COD_REG PIOA_CODR
00505 #define SBBI0_CS0_SOD_REG PIOA_SODR
00506 #elif SBBI0_CS0_PIO_ID == PIOB_ID
00507 #define SBBI0_CS0_PE_REG PIOB_PER
00508 #define SBBI0_CS0_OE_REG PIOB_OER
00509 #define SBBI0_CS0_COD_REG PIOB_CODR
00510 #define SBBI0_CS0_SOD_REG PIOB_SODR
00511 #elif SBBI0_CS0_PIO_ID == PIOC_ID
00512 #define SBBI0_CS0_PE_REG PIOC_PER
00513 #define SBBI0_CS0_OE_REG PIOC_OER
00514 #define SBBI0_CS0_COD_REG PIOC_CODR
00515 #define SBBI0_CS0_SOD_REG PIOC_SODR
00516 #endif
00517
00519 #define SBBI0_CS0_ENA() \
00520 outr(SBBI0_CS0_PE_REG, _BV(SBBI0_CS0_BIT)); \
00521 outr(SBBI0_CS0_OE_REG, _BV(SBBI0_CS0_BIT))
00522
00523 #define SBBI0_CS0_CLR() outr(SBBI0_CS0_COD_REG, _BV(SBBI0_CS0_BIT))
00524
00525 #define SBBI0_CS0_SET() outr(SBBI0_CS0_SOD_REG, _BV(SBBI0_CS0_BIT))
00526
00527 #else
00528
00529 #define SBBI0_CS0_ENA()
00530 #define SBBI0_CS0_CLR()
00531 #define SBBI0_CS0_SET()
00532
00533 #endif
00534
00535 #ifdef SBBI0_CS1_BIT
00536
00537 #if !defined(SBBI0_CS1_PIO_ID)
00538 #define SBBI0_CS1_PE_REG PIO_PER
00539 #define SBBI0_CS1_OE_REG PIO_OER
00540 #define SBBI0_CS1_COD_REG PIO_CODR
00541 #define SBBI0_CS1_SOD_REG PIO_SODR
00542 #elif SBBI0_CS1_PIO_ID == PIO_ID
00543 #define SBBI0_CS1_PE_REG PIO_PER
00544 #define SBBI0_CS1_OE_REG PIO_OER
00545 #define SBBI0_CS1_COD_REG PIO_CODR
00546 #define SBBI0_CS1_SOD_REG PIO_SODR
00547 #elif SBBI0_CS1_PIO_ID == PIOA_ID
00548 #define SBBI0_CS1_PE_REG PIOA_PER
00549 #define SBBI0_CS1_OE_REG PIOA_OER
00550 #define SBBI0_CS1_COD_REG PIOA_CODR
00551 #define SBBI0_CS1_SOD_REG PIOA_SODR
00552 #elif SBBI0_CS1_PIO_ID == PIOB_ID
00553 #define SBBI0_CS1_PE_REG PIOB_PER
00554 #define SBBI0_CS1_OE_REG PIOB_OER
00555 #define SBBI0_CS1_COD_REG PIOB_CODR
00556 #define SBBI0_CS1_SOD_REG PIOB_SODR
00557 #elif SBBI0_CS1_PIO_ID == PIOC_ID
00558 #define SBBI0_CS1_PE_REG PIOC_PER
00559 #define SBBI0_CS1_OE_REG PIOC_OER
00560 #define SBBI0_CS1_COD_REG PIOC_CODR
00561 #define SBBI0_CS1_SOD_REG PIOC_SODR
00562 #endif
00563
00565 #define SBBI0_CS1_ENA() \
00566 outr(SBBI0_CS1_PE_REG, _BV(SBBI0_CS1_BIT)); \
00567 outr(SBBI0_CS1_OE_REG, _BV(SBBI0_CS1_BIT))
00568
00569 #define SBBI0_CS1_CLR() outr(SBBI0_CS1_COD_REG, _BV(SBBI0_CS1_BIT))
00570
00571 #define SBBI0_CS1_SET() outr(SBBI0_CS1_SOD_REG, _BV(SBBI0_CS1_BIT))
00572
00573 #else
00574
00575 #define SBBI0_CS1_ENA()
00576 #define SBBI0_CS1_CLR()
00577 #define SBBI0_CS1_SET()
00578
00579 #endif
00580
00581 #ifdef SBBI0_CS2_BIT
00582
00583 #if !defined(SBBI0_CS2_PIO_ID)
00584 #define SBBI0_CS2_PE_REG PIO_PER
00585 #define SBBI0_CS2_OE_REG PIO_OER
00586 #define SBBI0_CS2_COD_REG PIO_CODR
00587 #define SBBI0_CS2_SOD_REG PIO_SODR
00588 #elif SBBI0_CS2_PIO_ID == PIO_ID
00589 #define SBBI0_CS2_PE_REG PIO_PER
00590 #define SBBI0_CS2_OE_REG PIO_OER
00591 #define SBBI0_CS2_COD_REG PIO_CODR
00592 #define SBBI0_CS2_SOD_REG PIO_SODR
00593 #elif SBBI0_CS2_PIO_ID == PIOA_ID
00594 #define SBBI0_CS2_PE_REG PIOA_PER
00595 #define SBBI0_CS2_OE_REG PIOA_OER
00596 #define SBBI0_CS2_COD_REG PIOA_CODR
00597 #define SBBI0_CS2_SOD_REG PIOA_SODR
00598 #elif SBBI0_CS2_PIO_ID == PIOB_ID
00599 #define SBBI0_CS2_PE_REG PIOB_PER
00600 #define SBBI0_CS2_OE_REG PIOB_OER
00601 #define SBBI0_CS2_COD_REG PIOB_CODR
00602 #define SBBI0_CS2_SOD_REG PIOB_SODR
00603 #elif SBBI0_CS2_PIO_ID == PIOC_ID
00604 #define SBBI0_CS2_PE_REG PIOC_PER
00605 #define SBBI0_CS2_OE_REG PIOC_OER
00606 #define SBBI0_CS2_COD_REG PIOC_CODR
00607 #define SBBI0_CS2_SOD_REG PIOC_SODR
00608 #endif
00609
00611 #define SBBI0_CS2_ENA() \
00612 outr(SBBI0_CS2_PE_REG, _BV(SBBI0_CS2_BIT)); \
00613 outr(SBBI0_CS2_OE_REG, _BV(SBBI0_CS2_BIT))
00614
00615 #define SBBI0_CS2_CLR() outr(SBBI0_CS2_COD_REG, _BV(SBBI0_CS2_BIT))
00616
00617 #define SBBI0_CS2_SET() outr(SBBI0_CS2_SOD_REG, _BV(SBBI0_CS2_BIT))
00618
00619 #else
00620
00621 #define SBBI0_CS2_ENA()
00622 #define SBBI0_CS2_CLR()
00623 #define SBBI0_CS2_SET()
00624
00625 #endif
00626
00627 #ifdef SBBI0_CS3_BIT
00628
00629 #if !defined(SBBI0_CS3_PIO_ID)
00630 #define SBBI0_CS3_PE_REG PIO_PER
00631 #define SBBI0_CS3_OE_REG PIO_OER
00632 #define SBBI0_CS3_COD_REG PIO_CODR
00633 #define SBBI0_CS3_SOD_REG PIO_SODR
00634 #elif SBBI0_CS3_PIO_ID == PIO_ID
00635 #define SBBI0_CS3_PE_REG PIO_PER
00636 #define SBBI0_CS3_OE_REG PIO_OER
00637 #define SBBI0_CS3_COD_REG PIO_CODR
00638 #define SBBI0_CS3_SOD_REG PIO_SODR
00639 #elif SBBI0_CS3_PIO_ID == PIOA_ID
00640 #define SBBI0_CS3_PE_REG PIOA_PER
00641 #define SBBI0_CS3_OE_REG PIOA_OER
00642 #define SBBI0_CS3_COD_REG PIOA_CODR
00643 #define SBBI0_CS3_SOD_REG PIOA_SODR
00644 #elif SBBI0_CS3_PIO_ID == PIOB_ID
00645 #define SBBI0_CS3_PE_REG PIOB_PER
00646 #define SBBI0_CS3_OE_REG PIOB_OER
00647 #define SBBI0_CS3_COD_REG PIOB_CODR
00648 #define SBBI0_CS3_SOD_REG PIOB_SODR
00649 #elif SBBI0_CS3_PIO_ID == PIOC_ID
00650 #define SBBI0_CS3_PE_REG PIOC_PER
00651 #define SBBI0_CS3_OE_REG PIOC_OER
00652 #define SBBI0_CS3_COD_REG PIOC_CODR
00653 #define SBBI0_CS3_SOD_REG PIOC_SODR
00654 #endif
00655
00657 #define SBBI0_CS3_ENA() \
00658 outr(SBBI0_CS3_PE_REG, _BV(SBBI0_CS3_BIT)); \
00659 outr(SBBI0_CS3_OE_REG, _BV(SBBI0_CS3_BIT))
00660
00661 #define SBBI0_CS3_CLR() outr(SBBI0_CS3_COD_REG, _BV(SBBI0_CS3_BIT))
00662
00663 #define SBBI0_CS3_SET() outr(SBBI0_CS3_SOD_REG, _BV(SBBI0_CS3_BIT))
00664
00665 #else
00666
00667 #define SBBI0_CS3_ENA()
00668 #define SBBI0_CS3_CLR()
00669 #define SBBI0_CS3_SET()
00670
00671 #endif
00672
00673 #ifdef SBBI0_RST0_BIT
00674
00675 #if !defined(SBBI0_RST0_PIO_ID)
00676 #define SBBI0_RST0_PE_REG PIO_PER
00677 #define SBBI0_RST0_OE_REG PIO_OER
00678 #define SBBI0_RST0_COD_REG PIO_CODR
00679 #define SBBI0_RST0_SOD_REG PIO_SODR
00680 #elif SBBI0_RST0_PIO_ID == PIO_ID
00681 #define SBBI0_RST0_PE_REG PIO_PER
00682 #define SBBI0_RST0_OE_REG PIO_OER
00683 #define SBBI0_RST0_COD_REG PIO_CODR
00684 #define SBBI0_RST0_SOD_REG PIO_SODR
00685 #elif SBBI0_RST0_PIO_ID == PIOA_ID
00686 #define SBBI0_RST0_PE_REG PIOA_PER
00687 #define SBBI0_RST0_OE_REG PIOA_OER
00688 #define SBBI0_RST0_COD_REG PIOA_CODR
00689 #define SBBI0_RST0_SOD_REG PIOA_SODR
00690 #elif SBBI0_RST0_PIO_ID == PIOB_ID
00691 #define SBBI0_RST0_PE_REG PIOB_PER
00692 #define SBBI0_RST0_OE_REG PIOB_OER
00693 #define SBBI0_RST0_COD_REG PIOB_CODR
00694 #define SBBI0_RST0_SOD_REG PIOB_SODR
00695 #elif SBBI0_RST0_PIO_ID == PIOC_ID
00696 #define SBBI0_RST0_PE_REG PIOC_PER
00697 #define SBBI0_RST0_OE_REG PIOC_OER
00698 #define SBBI0_RST0_COD_REG PIOC_CODR
00699 #define SBBI0_RST0_SOD_REG PIOC_SODR
00700 #endif
00701
00703 #define SBBI0_RST0_ENA() \
00704 outr(SBBI0_RST0_PE_REG, _BV(SBBI0_RST0_BIT)); \
00705 outr(SBBI0_RST0_OE_REG, _BV(SBBI0_RST0_BIT))
00706
00707 #define SBBI0_RST0_CLR() outr(SBBI0_RST0_COD_REG, _BV(SBBI0_RST0_BIT))
00708
00709 #define SBBI0_RST0_SET() outr(SBBI0_RST0_SOD_REG, _BV(SBBI0_RST0_BIT))
00710
00711 #else
00712
00713 #define SBBI0_RST0_ENA()
00714 #define SBBI0_RST0_CLR()
00715 #define SBBI0_RST0_SET()
00716
00717 #endif
00718
00719 #ifdef SBBI0_RST1_BIT
00720
00721 #if !defined(SBBI0_RST1_PIO_ID)
00722 #define SBBI0_RST1_PE_REG PIO_PER
00723 #define SBBI0_RST1_OE_REG PIO_OER
00724 #define SBBI0_RST1_COD_REG PIO_CODR
00725 #define SBBI0_RST1_SOD_REG PIO_SODR
00726 #elif SBBI0_RST1_PIO_ID == PIO_ID
00727 #define SBBI0_RST1_PE_REG PIO_PER
00728 #define SBBI0_RST1_OE_REG PIO_OER
00729 #define SBBI0_RST1_COD_REG PIO_CODR
00730 #define SBBI0_RST1_SOD_REG PIO_SODR
00731 #elif SBBI0_RST1_PIO_ID == PIOA_ID
00732 #define SBBI0_RST1_PE_REG PIOA_PER
00733 #define SBBI0_RST1_OE_REG PIOA_OER
00734 #define SBBI0_RST1_COD_REG PIOA_CODR
00735 #define SBBI0_RST1_SOD_REG PIOA_SODR
00736 #elif SBBI0_RST1_PIO_ID == PIOB_ID
00737 #define SBBI0_RST1_PE_REG PIOB_PER
00738 #define SBBI0_RST1_OE_REG PIOB_OER
00739 #define SBBI0_RST1_COD_REG PIOB_CODR
00740 #define SBBI0_RST1_SOD_REG PIOB_SODR
00741 #elif SBBI0_RST1_PIO_ID == PIOC_ID
00742 #define SBBI0_RST1_PE_REG PIOC_PER
00743 #define SBBI0_RST1_OE_REG PIOC_OER
00744 #define SBBI0_RST1_COD_REG PIOC_CODR
00745 #define SBBI0_RST1_SOD_REG PIOC_SODR
00746 #endif
00747
00749 #define SBBI0_RST1_ENA() \
00750 outr(SBBI0_RST1_PE_REG, _BV(SBBI0_RST1_BIT)); \
00751 outr(SBBI0_RST1_OE_REG, _BV(SBBI0_RST1_BIT))
00752
00753 #define SBBI0_RST1_CLR() outr(SBBI0_RST1_COD_REG, _BV(SBBI0_RST1_BIT))
00754
00755 #define SBBI0_RST1_SET() outr(SBBI0_RST1_SOD_REG, _BV(SBBI0_RST1_BIT))
00756
00757 #else
00758
00759 #define SBBI0_RST1_ENA()
00760 #define SBBI0_RST1_CLR()
00761 #define SBBI0_RST1_SET()
00762
00763 #endif
00764
00765 #ifdef SBBI0_RST2_BIT
00766
00767 #if !defined(SBBI0_RST2_PIO_ID)
00768 #define SBBI0_RST2_PE_REG PIO_PER
00769 #define SBBI0_RST2_OE_REG PIO_OER
00770 #define SBBI0_RST2_COD_REG PIO_CODR
00771 #define SBBI0_RST2_SOD_REG PIO_SODR
00772 #elif SBBI0_RST2_PIO_ID == PIO_ID
00773 #define SBBI0_RST2_PE_REG PIO_PER
00774 #define SBBI0_RST2_OE_REG PIO_OER
00775 #define SBBI0_RST2_COD_REG PIO_CODR
00776 #define SBBI0_RST2_SOD_REG PIO_SODR
00777 #elif SBBI0_RST2_PIO_ID == PIOA_ID
00778 #define SBBI0_RST2_PE_REG PIOA_PER
00779 #define SBBI0_RST2_OE_REG PIOA_OER
00780 #define SBBI0_RST2_COD_REG PIOA_CODR
00781 #define SBBI0_RST2_SOD_REG PIOA_SODR
00782 #elif SBBI0_RST2_PIO_ID == PIOB_ID
00783 #define SBBI0_RST2_PE_REG PIOB_PER
00784 #define SBBI0_RST2_OE_REG PIOB_OER
00785 #define SBBI0_RST2_COD_REG PIOB_CODR
00786 #define SBBI0_RST2_SOD_REG PIOB_SODR
00787 #elif SBBI0_RST2_PIO_ID == PIOC_ID
00788 #define SBBI0_RST2_PE_REG PIOC_PER
00789 #define SBBI0_RST2_OE_REG PIOC_OER
00790 #define SBBI0_RST2_COD_REG PIOC_CODR
00791 #define SBBI0_RST2_SOD_REG PIOC_SODR
00792 #endif
00793
00795 #define SBBI0_RST2_ENA() \
00796 outr(SBBI0_RST2_PE_REG, _BV(SBBI0_RST2_BIT)); \
00797 outr(SBBI0_RST2_OE_REG, _BV(SBBI0_RST2_BIT))
00798
00799 #define SBBI0_RST2_CLR() outr(SBBI0_RST2_COD_REG, _BV(SBBI0_RST2_BIT))
00800
00801 #define SBBI0_RST2_SET() outr(SBBI0_RST2_SOD_REG, _BV(SBBI0_RST2_BIT))
00802
00803 #else
00804
00805 #define SBBI0_RST2_ENA()
00806 #define SBBI0_RST2_CLR()
00807 #define SBBI0_RST2_SET()
00808
00809 #endif
00810
00811 #ifdef SBBI0_RST3_BIT
00812
00813 #if !defined(SBBI0_RST3_PIO_ID)
00814 #define SBBI0_RST3_PE_REG PIO_PER
00815 #define SBBI0_RST3_OE_REG PIO_OER
00816 #define SBBI0_RST3_COD_REG PIO_CODR
00817 #define SBBI0_RST3_SOD_REG PIO_SODR
00818 #elif SBBI0_RST3_PIO_ID == PIO_ID
00819 #define SBBI0_RST3_PE_REG PIO_PER
00820 #define SBBI0_RST3_OE_REG PIO_OER
00821 #define SBBI0_RST3_COD_REG PIO_CODR
00822 #define SBBI0_RST3_SOD_REG PIO_SODR
00823 #elif SBBI0_RST3_PIO_ID == PIOA_ID
00824 #define SBBI0_RST3_PE_REG PIOA_PER
00825 #define SBBI0_RST3_OE_REG PIOA_OER
00826 #define SBBI0_RST3_COD_REG PIOA_CODR
00827 #define SBBI0_RST3_SOD_REG PIOA_SODR
00828 #elif SBBI0_RST3_PIO_ID == PIOB_ID
00829 #define SBBI0_RST3_PE_REG PIOB_PER
00830 #define SBBI0_RST3_OE_REG PIOB_OER
00831 #define SBBI0_RST3_COD_REG PIOB_CODR
00832 #define SBBI0_RST3_SOD_REG PIOB_SODR
00833 #elif SBBI0_RST3_PIO_ID == PIOC_ID
00834 #define SBBI0_RST3_PE_REG PIOC_PER
00835 #define SBBI0_RST3_OE_REG PIOC_OER
00836 #define SBBI0_RST3_COD_REG PIOC_CODR
00837 #define SBBI0_RST3_SOD_REG PIOC_SODR
00838 #endif
00839
00841 #define SBBI0_RST3_ENA() \
00842 outr(SBBI0_RST3_PE_REG, _BV(SBBI0_RST3_BIT)); \
00843 outr(SBBI0_RST3_OE_REG, _BV(SBBI0_RST3_BIT))
00844
00845 #define SBBI0_RST3_CLR() outr(SBBI0_RST3_COD_REG, _BV(SBBI0_RST3_BIT))
00846
00847 #define SBBI0_RST3_SET() outr(SBBI0_RST3_SOD_REG, _BV(SBBI0_RST3_BIT))
00848
00849 #else
00850
00851 #define SBBI0_RST3_ENA()
00852 #define SBBI0_RST3_CLR()
00853 #define SBBI0_RST3_SET()
00854
00855 #endif
00856
00857 #ifdef SBBI0_SCK_BIT
00858
00859 #if !defined(SBBI0_SCK_PIO_ID)
00860 #define SBBI0_SCK_PE_REG PIO_PER
00861 #define SBBI0_SCK_OE_REG PIO_OER
00862 #define SBBI0_SCK_COD_REG PIO_CODR
00863 #define SBBI0_SCK_SOD_REG PIO_SODR
00864 #elif SBBI0_SCK_PIO_ID == PIO_ID
00865 #define SBBI0_SCK_PE_REG PIO_PER
00866 #define SBBI0_SCK_OE_REG PIO_OER
00867 #define SBBI0_SCK_COD_REG PIO_CODR
00868 #define SBBI0_SCK_SOD_REG PIO_SODR
00869 #elif SBBI0_SCK_PIO_ID == PIOA_ID
00870 #define SBBI0_SCK_PE_REG PIOA_PER
00871 #define SBBI0_SCK_OE_REG PIOA_OER
00872 #define SBBI0_SCK_COD_REG PIOA_CODR
00873 #define SBBI0_SCK_SOD_REG PIOA_SODR
00874 #elif SBBI0_SCK_PIO_ID == PIOB_ID
00875 #define SBBI0_SCK_PE_REG PIOB_PER
00876 #define SBBI0_SCK_OE_REG PIOB_OER
00877 #define SBBI0_SCK_COD_REG PIOB_CODR
00878 #define SBBI0_SCK_SOD_REG PIOB_SODR
00879 #elif SBBI0_SCK_PIO_ID == PIOC_ID
00880 #define SBBI0_SCK_PE_REG PIOC_PER
00881 #define SBBI0_SCK_OE_REG PIOC_OER
00882 #define SBBI0_SCK_COD_REG PIOC_CODR
00883 #define SBBI0_SCK_SOD_REG PIOC_SODR
00884 #endif
00885
00887 #define SBBI0_SCK_ENA() \
00888 outr(SBBI0_SCK_PE_REG, _BV(SBBI0_SCK_BIT)); \
00889 outr(SBBI0_SCK_OE_REG, _BV(SBBI0_SCK_BIT))
00890
00891 #define SBBI0_SCK_CLR() outr(SBBI0_SCK_COD_REG, _BV(SBBI0_SCK_BIT))
00892
00893 #define SBBI0_SCK_SET() outr(SBBI0_SCK_SOD_REG, _BV(SBBI0_SCK_BIT))
00894
00895 #ifdef SBBI0_MOSI_BIT
00896
00897 #if !defined(SBBI0_MOSI_PIO_ID)
00898 #define SBBI0_MOSI_PE_REG PIO_PER
00899 #define SBBI0_MOSI_OE_REG PIO_OER
00900 #define SBBI0_MOSI_COD_REG PIO_CODR
00901 #define SBBI0_MOSI_SOD_REG PIO_SODR
00902 #elif SBBI0_MOSI_PIO_ID == PIO_ID
00903 #define SBBI0_MOSI_PE_REG PIO_PER
00904 #define SBBI0_MOSI_OE_REG PIO_OER
00905 #define SBBI0_MOSI_COD_REG PIO_CODR
00906 #define SBBI0_MOSI_SOD_REG PIO_SODR
00907 #elif SBBI0_MOSI_PIO_ID == PIOA_ID
00908 #define SBBI0_MOSI_PE_REG PIOA_PER
00909 #define SBBI0_MOSI_OE_REG PIOA_OER
00910 #define SBBI0_MOSI_COD_REG PIOA_CODR
00911 #define SBBI0_MOSI_SOD_REG PIOA_SODR
00912 #elif SBBI0_MOSI_PIO_ID == PIOB_ID
00913 #define SBBI0_MOSI_PE_REG PIOB_PER
00914 #define SBBI0_MOSI_OE_REG PIOB_OER
00915 #define SBBI0_MOSI_COD_REG PIOB_CODR
00916 #define SBBI0_MOSI_SOD_REG PIOB_SODR
00917 #elif SBBI0_MOSI_PIO_ID == PIOC_ID
00918 #define SBBI0_MOSI_PE_REG PIOC_PER
00919 #define SBBI0_MOSI_OE_REG PIOC_OER
00920 #define SBBI0_MOSI_COD_REG PIOC_CODR
00921 #define SBBI0_MOSI_SOD_REG PIOC_SODR
00922 #endif
00923
00925 #define SBBI0_MOSI_ENA() \
00926 outr(SBBI0_MOSI_PE_REG, _BV(SBBI0_MOSI_BIT)); \
00927 outr(SBBI0_MOSI_OE_REG, _BV(SBBI0_MOSI_BIT))
00928
00929 #define SBBI0_MOSI_CLR() outr(SBBI0_MOSI_COD_REG, _BV(SBBI0_MOSI_BIT))
00930
00931 #define SBBI0_MOSI_SET() outr(SBBI0_MOSI_SOD_REG, _BV(SBBI0_MOSI_BIT))
00932
00933 #else
00934
00935 #define SBBI0_MOSI_ENA()
00936 #define SBBI0_MOSI_CLR()
00937 #define SBBI0_MOSI_SET()
00938
00939 #endif
00940
00941 #ifdef SBBI0_MISO_BIT
00942
00943 #if !defined(SBBI0_MISO_PIO_ID)
00944 #define SBBI0_MISO_PE_REG PIO_PER
00945 #define SBBI0_MISO_OD_REG PIO_ODR
00946 #define SBBI0_MISO_PDS_REG PIO_PDSR
00947 #elif SBBI0_MISO_PIO_ID == PIO_ID
00948 #define SBBI0_MISO_PE_REG PIO_PER
00949 #define SBBI0_MISO_OD_REG PIO_ODR
00950 #define SBBI0_MISO_PDS_REG PIO_PDSR
00951 #elif SBBI0_MISO_PIO_ID == PIOA_ID
00952 #define SBBI0_MISO_PE_REG PIOA_PER
00953 #define SBBI0_MISO_OD_REG PIOA_ODR
00954 #define SBBI0_MISO_PDS_REG PIOA_PDSR
00955 #elif SBBI0_MISO_PIO_ID == PIOB_ID
00956 #define SBBI0_MISO_PE_REG PIOB_PER
00957 #define SBBI0_MISO_OD_REG PIOB_ODR
00958 #define SBBI0_MISO_PDS_REG PIOB_PDSR
00959 #elif SBBI0_MISO_PIO_ID == PIOC_ID
00960 #define SBBI0_MISO_PE_REG PIOC_PER
00961 #define SBBI0_MISO_OD_REG PIOC_ODR
00962 #define SBBI0_MISO_PDS_REG PIOC_PDSR
00963 #endif
00964
00966 #define SBBI0_MISO_ENA() \
00967 outr(SBBI0_MISO_PE_REG, _BV(SBBI0_MISO_BIT)); \
00968 outr(SBBI0_MISO_OD_REG, _BV(SBBI0_MISO_BIT))
00969
00970 #define SBBI0_MISO_TST() ((inr(SBBI0_MISO_PDS_REG) & _BV(SBBI0_MISO_BIT)) == _BV(SBBI0_MISO_BIT))
00971
00972 #else
00973
00974 #define SBBI0_MISO_ENA()
00975 #define SBBI0_MISO_TST() 0
00976
00977 #endif
00978
00979 #else
00980
00981 #define SBBI0_SCK_ENA()
00982 #define SBBI0_SCK_CLR()
00983 #define SBBI0_SCK_SET()
00984
00985 #define SBBI0_MOSI_ENA()
00986 #define SBBI0_MOSI_CLR()
00987 #define SBBI0_MOSI_SET()
00988
00989 #define SBBI0_MISO_ENA()
00990 #define SBBI0_MISO_TST() 0
00991
00992 #endif
00993
00994 #endif
00995
00996 #define SBBI0_INIT() \
00997 { \
00998 SBBI0_SCK_CLR(); \
00999 SBBI0_SCK_ENA(); \
01000 SBBI0_MOSI_CLR(); \
01001 SBBI0_MOSI_ENA(); \
01002 SBBI0_MISO_ENA(); \
01003 }
01004
01005 __BEGIN_DECLS
01006
01007
01008 extern int Sbbi0SetMode(ureg_t ix, ureg_t mode);
01009 extern void Sbbi0SetSpeed(ureg_t ix, u_long rate);
01010 extern void Sbbi0Enable(ureg_t ix);
01011 extern void Sbbi0ChipReset(ureg_t ix, ureg_t hi);
01012 extern void Sbbi0ChipSelect(ureg_t ix, ureg_t hi);
01013 extern void Sbbi0SelectDevice(ureg_t ix);
01014 extern void Sbbi0DeselectDevice(ureg_t ix);
01015 extern void Sbbi0NegSelectDevice(ureg_t ix);
01016 extern void Sbbi0NegDeselectDevice(ureg_t ix);
01017 extern u_char Sbbi0Byte(u_char data);
01018 extern void Sbbi0Transact(CONST void *wdata, void *rdata, size_t len);
01019
01020 __END_DECLS
01021
01022
01023 #endif