ih_at91irq2.c

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00001 /*
00002  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  *
00032  */
00033 
00034 /*
00035  * $Log: ih_at91irq2.c,v $
00036  * Revision 1.4  2006/07/05 07:56:34  haraldkipp
00037  * Interrupt handler will be included only, if the related interrupt
00038  * ID is defined in the platform specific header file.
00039  *
00040  * Revision 1.3  2006/06/28 17:10:15  haraldkipp
00041  * Include more general header file for ARM.
00042  *
00043  * Revision 1.2  2006/04/07 12:22:27  haraldkipp
00044  * *** empty log message ***
00045  *
00046  * Revision 1.1  2005/10/24 08:56:09  haraldkipp
00047  * First check in.
00048  *
00049  */
00050 
00051 #include <arch/arm.h>
00052 #include <dev/irqreg.h>
00053 
00054 #if defined (IRQ2_ID)
00055 
00056 #ifndef NUT_IRQPRI_IRQ2
00057 #define NUT_IRQPRI_IRQ2  4
00058 #endif
00059 
00060 static int Interrupt2Ctl(int cmd, void *param);
00061 
00062 IRQ_HANDLER sig_INTERRUPT2 = {
00063 #ifdef NUT_PERFMON
00064     0,                  /* Interrupt counter, ir_count. */
00065 #endif
00066     NULL,               /* Passed argument, ir_arg. */
00067     NULL,               /* Handler subroutine, ir_handler. */
00068     Interrupt2Ctl       /* Interrupt control, ir_ctl. */
00069 };
00070 
00074 static void Interrupt2Entry(void) __attribute__ ((naked));
00075 void Interrupt2Entry(void)
00076 {
00077     IRQ_ENTRY();
00078 #ifdef NUT_PERFMON
00079     sig_INTERRUPT2.ir_count++;
00080 #endif
00081     if (sig_INTERRUPT2.ir_handler) {
00082         (sig_INTERRUPT2.ir_handler) (sig_INTERRUPT2.ir_arg);
00083     }
00084     IRQ_EXIT();
00085 }
00086 
00102 static int Interrupt2Ctl(int cmd, void *param)
00103 {
00104     int rc = 0;
00105     u_int *ival = (u_int *)param;
00106     int enabled = inr(AIC_IMR) & _BV(IRQ2_ID);
00107 
00108     /* Disable interrupt. */
00109     if (enabled) {
00110         outr(AIC_IDCR, _BV(IRQ2_ID));
00111     }
00112 
00113     switch(cmd) {
00114     case NUT_IRQCTL_INIT:
00115         /* Set the vector. */
00116         outr(AIC_SVR(IRQ2_ID), (unsigned int)Interrupt2Entry);
00117         /* Initialize to edge triggered with defined priority. */
00118         outr(AIC_SMR(IRQ2_ID), AIC_SRCTYPE_EXT_NEGATIVE_EDGE | NUT_IRQPRI_IRQ2);
00119         /* Clear interrupt */
00120         outr(AIC_ICCR, _BV(IRQ2_ID));
00121         break;
00122     case NUT_IRQCTL_STATUS:
00123         if (enabled) {
00124             *ival |= 1;
00125         }
00126         else {
00127             *ival &= ~1;
00128         }
00129         break;
00130     case NUT_IRQCTL_ENABLE:
00131         enabled = 1;
00132         break;
00133     case NUT_IRQCTL_DISABLE:
00134         enabled = 0;
00135         break;
00136     case NUT_IRQCTL_GETMODE:
00137         {
00138             u_int val = inr(AIC_SMR(IRQ2_ID)) & AIC_SRCTYPE;
00139 
00140             if (val == AIC_SRCTYPE_EXT_LOW_LEVEL) {
00141                 *ival = NUT_IRQMODE_LOWLEVEL;
00142             } else if (val == AIC_SRCTYPE_EXT_HIGH_LEVEL) {
00143                 *ival = NUT_IRQMODE_HIGHLEVEL;
00144             } else if (val == AIC_SRCTYPE_EXT_POSITIVE_EDGE) {
00145                 *ival = NUT_IRQMODE_RISINGEDGE;
00146             } else  {
00147                 *ival = NUT_IRQMODE_FALLINGEDGE;
00148             }
00149         }
00150         break;
00151     case NUT_IRQCTL_SETMODE:
00152         if (*ival == NUT_IRQMODE_LOWLEVEL) {
00153             outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_LOW_LEVEL);
00154         } else if (*ival == NUT_IRQMODE_HIGHLEVEL) {
00155             outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_HIGH_LEVEL);
00156         } else if (*ival == NUT_IRQMODE_FALLINGEDGE) {
00157             outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_NEGATIVE_EDGE);
00158         } else  if (*ival == NUT_IRQMODE_RISINGEDGE) {
00159             outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_SRCTYPE) | AIC_SRCTYPE_EXT_POSITIVE_EDGE);
00160         } else  {
00161             rc = -1;
00162         }
00163         break;
00164     case NUT_IRQCTL_GETPRIO:
00165         *ival = inr(AIC_SMR(IRQ2_ID)) & AIC_PRIOR;
00166         break;
00167     case NUT_IRQCTL_SETPRIO:
00168         outr(AIC_SMR(IRQ2_ID), (inr(AIC_SMR(IRQ2_ID)) & ~AIC_PRIOR) | *ival);
00169         break;
00170 #ifdef NUT_PERFMON
00171     case NUT_IRQCTL_GETCOUNT:
00172         *ival = (u_int)sig_INTERRUPT2.ir_count;
00173         sig_INTERRUPT2.ir_count = 0;
00174         break;
00175 #endif
00176     default:
00177         rc = -1;
00178         break;
00179     }
00180 
00181     /* Enable interrupt. */
00182     if (enabled) {
00183         outr(AIC_IECR, _BV(IRQ2_ID));
00184     }
00185     return rc;
00186 }
00187 
00188 #endif /* IRQ2_ID */

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