ih_at91spi0.c

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00001 /*
00002  * Copyright (C) 2006 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  *
00032  */
00033 
00034 /*
00035  * $Log: ih_at91spi0.c,v $
00036  * Revision 1.1  2006/09/29 12:34:59  haraldkipp
00037  * Basic AT91 SPI support added.
00038  *
00039  */
00040 
00041 #include <arch/arm.h>
00042 #include <dev/irqreg.h>
00043 
00044 #ifndef NUT_IRQPRI_SPI0
00045 #define NUT_IRQPRI_SPI0  4
00046 #endif
00047 
00048 static int SerialPeripheral0IrqCtl(int cmd, void *param);
00049 
00050 IRQ_HANDLER sig_SPI0 = {
00051 #ifdef NUT_PERFMON
00052     0,                          /* Interrupt counter, ir_count. */
00053 #endif
00054     NULL,                       /* Passed argument, ir_arg. */
00055     NULL,                       /* Handler subroutine, ir_handler. */
00056     SerialPeripheral0IrqCtl     /* Interrupt control, ir_ctl. */
00057 };
00058 
00062 static void SerialPeripheral0IrqEntry(void) __attribute__ ((naked));
00063 void SerialPeripheral0IrqEntry(void)
00064 {
00065     IRQ_ENTRY();
00066 #ifdef NUT_PERFMON
00067     sig_SPI0.ir_count++;
00068 #endif
00069     if (sig_SPI0.ir_handler) {
00070         (sig_SPI0.ir_handler) (sig_SPI0.ir_arg);
00071     }
00072     IRQ_EXIT();
00073 }
00074 
00090 static int SerialPeripheral0IrqCtl(int cmd, void *param)
00091 {
00092     int rc = 0;
00093     u_int *ival = (u_int *) param;
00094     int enabled = inr(AIC_IMR) & _BV(SPI0_ID);
00095 
00096     /* Disable interrupt. */
00097     if (enabled) {
00098         outr(AIC_IDCR, _BV(SPI0_ID));
00099     }
00100 
00101     switch (cmd) {
00102     case NUT_IRQCTL_INIT:
00103         /* Set the vector. */
00104         outr(AIC_SVR(SPI0_ID), (unsigned int) SerialPeripheral0IrqEntry);
00105         /* Initialize to edge triggered with defined priority. */
00106         outr(AIC_SMR(SPI0_ID), AIC_SRCTYPE_INT_EDGE_TRIGGERED | NUT_IRQPRI_SPI0);
00107         /* Clear interrupt */
00108         outr(AIC_ICCR, _BV(SPI0_ID));
00109         break;
00110     case NUT_IRQCTL_STATUS:
00111         if (enabled) {
00112             *ival |= 1;
00113         } else {
00114             *ival &= ~1;
00115         }
00116         break;
00117     case NUT_IRQCTL_ENABLE:
00118         enabled = 1;
00119         break;
00120     case NUT_IRQCTL_DISABLE:
00121         enabled = 0;
00122         break;
00123     case NUT_IRQCTL_GETPRIO:
00124         *ival = inr(AIC_SMR(SPI0_ID)) & AIC_PRIOR;
00125         break;
00126     case NUT_IRQCTL_SETPRIO:
00127         outr(AIC_SMR(SPI0_ID), (inr(AIC_SMR(SPI0_ID)) & ~AIC_PRIOR) | *ival);
00128         break;
00129 #ifdef NUT_PERFMON
00130     case NUT_IRQCTL_GETCOUNT:
00131         *ival = (u_int) sig_SPI0.ir_count;
00132         sig_SPI0.ir_count = 0;
00133         break;
00134 #endif
00135     default:
00136         rc = -1;
00137         break;
00138     }
00139 
00140     /* Enable interrupt. */
00141     if (enabled) {
00142         outr(AIC_IECR, _BV(SPI0_ID));
00143     }
00144     return rc;
00145 }

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